From b541160f381e6fb554e94ed3ecef7114c53f6e79 Mon Sep 17 00:00:00 2001 From: Astro Date: Fri, 18 Oct 2019 23:46:00 +0200 Subject: [PATCH] add zynq::axi_hp --- src/main.rs | 1 + src/zynq/axi_hp.rs | 59 ++++++++++++++++++++++++++++++++++++++++++++++ src/zynq/mod.rs | 1 + 3 files changed, 61 insertions(+) create mode 100644 src/zynq/axi_hp.rs create mode 100644 src/zynq/mod.rs diff --git a/src/main.rs b/src/main.rs index 580f180..944192c 100644 --- a/src/main.rs +++ b/src/main.rs @@ -23,6 +23,7 @@ mod slcr; mod uart; mod stdio; mod eth; +mod zynq; use crate::regs::{RegisterR, RegisterW}; use crate::cortex_a9::{asm, regs::*, mmu}; diff --git a/src/zynq/axi_hp.rs b/src/zynq/axi_hp.rs new file mode 100644 index 0000000..b585bb6 --- /dev/null +++ b/src/zynq/axi_hp.rs @@ -0,0 +1,59 @@ +//! AXI_HP Interface (AFI) + +use volatile_register::RW; + +use crate::{register, register_bit, register_bits, register_bits_typed}; + +pub unsafe fn axi_hp0() -> &'static RegisterBlock { + &*(0xF8008000 as *const _) +} + +pub unsafe fn axi_hp1() -> &'static RegisterBlock { + &*(0xF8009000 as *const _) +} + +pub unsafe fn axi_hp2() -> &'static RegisterBlock { + &*(0xF800A000 as *const _) +} + +pub unsafe fn axi_hp3() -> &'static RegisterBlock { + &*(0xF800B000 as *const _) +} + +#[repr(C)] +pub struct RegisterBlock { + /// Read Channel Control Register + pub rdchan_ctrl: RdchanCtrl, + /// Read Issuing Capability Register + pub rdchan_issuingcap: RW, + /// QOS Read Channel Register + pub rdqos: RW, + /// Read Data FIFO Level Register + pub rddatafifo_level: RW, + /// Read Channel Debug Register + pub rddebug: RW, + /// Write Channel Control Register + pub wrchan_ctrl: WrchanCtrl, + /// Write Issuing Capability Register + pub wrchan_issuingcap: RW, + /// QOS Write Channel Register + pub wrqos: RW, + /// Write Data FIFO Level Register + pub wrdatafifo_level: RW, + /// Write Channel Debug Register + pub wrdebug: RW, +} + +register!(rdchan_ctrl, RdchanCtrl, RW, u32); +register_bit!(rdchan_ctrl, en_32bit, 0); +register_bit!(rdchan_ctrl, fabric_qos_en, 1); +register_bit!(rdchan_ctrl, fabric_out_cmd_en, 2); +register_bit!(rdchan_ctrl, qos_head_of_cmd_q_en, 3); + +register!(wrchan_ctrl, WrchanCtrl, RW, u32); +register_bit!(wrchan_ctrl, en_32bit, 0); +register_bit!(wrchan_ctrl, fabric_qos_en, 1); +register_bit!(wrchan_ctrl, fabric_out_cmd_en, 2); +register_bit!(wrchan_ctrl, qos_head_of_cmd_q_en, 3); +register_bits!(wrchan_ctrl, wr_cmd_release_mode, u8, 4, 5); +register_bits!(wrchan_ctrl, wr_data_threshold, u8, 8, 11); diff --git a/src/zynq/mod.rs b/src/zynq/mod.rs new file mode 100644 index 0000000..163a695 --- /dev/null +++ b/src/zynq/mod.rs @@ -0,0 +1 @@ +pub mod axi_hp;