forked from M-Labs/artiq-zynq
newell
d79bf8d54a
Co-authored-by: newell <newell.jensen@gmail.com> Co-committed-by: newell <newell.jensen@gmail.com>
79 lines
2.0 KiB
Python
79 lines
2.0 KiB
Python
core_addr = "192.168.1.57"
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device_db = {
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"core": {
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"type": "local",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"arguments": {
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"host": core_addr,
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"ref_period": 1e-9,
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"target": "cortexa9",
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},
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},
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"core_log": {
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"type": "controller",
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"host": "::1",
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"port": 1068,
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"command": "aqctl_corelog -p {port} --bind {bind} " + core_addr,
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},
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"core_moninj": {
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"type": "controller",
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"host": "::1",
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"port_proxy": 1383,
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"port": 1384,
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"command": "aqctl_moninj_proxy --port-proxy {port_proxy} --port-control {port} --bind {bind} "
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+ core_addr,
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},
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"core_analyzer": {
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"type": "controller",
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"host": "::1",
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"port_proxy": 1385,
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"port": 1386,
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"command": "aqctl_coreanalyzer_proxy --port-proxy {port_proxy} --port-control {port} --bind {bind} "
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+ core_addr,
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},
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"core_cache": {
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"type": "local",
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"module": "artiq.coredevice.cache",
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"class": "CoreCache",
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},
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"core_dma": {"type": "local", "module": "artiq.coredevice.dma", "class": "CoreDMA"},
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"led0": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 0},
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},
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"led1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 1},
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},
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}
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# TTLs starting at RTIO channel 2, ending at RTIO channel 15
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for i in range(2, 16):
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device_db["ttl" + str(i)] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": i},
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}
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device_db.update(
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spi0={
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 16},
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},
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dds0={
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"type": "local",
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"module": "artiq.coredevice.ad9834",
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"class": "AD9834",
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"arguments": {"spi_device": "spi0"},
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},
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)
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