From 812aea33b3cae41f70d35d5ca8a6eb4a507fdbed Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Wed, 11 Oct 2023 17:56:30 +0800
Subject: [PATCH] rustfmt

---
 src/libboard_artiq/src/drtio_eem.rs | 25 ++++++++++---------------
 src/libboard_artiq/src/lib.rs       |  4 ++--
 src/runtime/src/main.rs             |  4 ++--
 3 files changed, 14 insertions(+), 19 deletions(-)

diff --git a/src/libboard_artiq/src/drtio_eem.rs b/src/libboard_artiq/src/drtio_eem.rs
index 90b77e30..11d2e1f5 100644
--- a/src/libboard_artiq/src/drtio_eem.rs
+++ b/src/libboard_artiq/src/drtio_eem.rs
@@ -1,10 +1,11 @@
-use crate::pl;
 use embedded_hal::prelude::_embedded_hal_blocking_delay_DelayUs;
 use libboard_zynq::timer::GlobalTimer;
 use libconfig::Config;
 use libsupport_zynq::alloc::format;
 use log::{debug, error, info};
 
+use crate::pl;
+
 struct SerdesConfig {
     pub delay: [u8; 4],
 }
@@ -61,11 +62,7 @@ unsafe fn assign_delay(timer: &mut GlobalTimer) -> SerdesConfig {
                 if prev_low_rate <= curr_low_rate && curr_low_rate >= 0.5 {
                     let prev_dev = 0.5 - prev_low_rate;
                     let curr_dev = curr_low_rate - 0.5;
-                    let selected_idx = if prev_dev < curr_dev {
-                        curr_dly - 1
-                    } else {
-                        curr_dly
-                    };
+                    let selected_idx = if prev_dev < curr_dev { curr_dly - 1 } else { curr_dly };
 
                     // The setup setup/hold calibration timing (even with
                     // tolerance) might be invalid in other lanes due to skew.
@@ -110,11 +107,7 @@ unsafe fn assign_delay(timer: &mut GlobalTimer) -> SerdesConfig {
             let index = (best_dly as isize + dly_delta) as u8;
             let low_rate = read_align(index, timer);
             // abs() from f32 is not available in core library
-            let deviation = if low_rate < 0.5 {
-                0.5 - low_rate
-            } else {
-                low_rate - 0.5
-            };
+            let deviation = if low_rate < 0.5 { 0.5 - low_rate } else { low_rate - 0.5 };
 
             if deviation < min_deviation {
                 min_deviation = deviation;
@@ -128,9 +121,7 @@ unsafe fn assign_delay(timer: &mut GlobalTimer) -> SerdesConfig {
 
     debug!("setup/hold timing calibration: {:?}", delay_list);
 
-    SerdesConfig {
-        delay: delay_list,
-    }
+    SerdesConfig { delay: delay_list }
 }
 
 fn read_align(dly: u8, timer: &mut GlobalTimer) -> f32 {
@@ -219,7 +210,11 @@ pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
                         info!("storing calibration timing values into sd card");
                     }
                     Err(e) => {
-                        error!("calibration successful but calibration timing values cannot be stored into sd card. Error:{}", e);
+                        error!(
+                            "calibration successful but calibration timing values cannot be stored into sd card. \
+                             Error:{}",
+                            e
+                        );
                     }
                 };
             }
diff --git a/src/libboard_artiq/src/lib.rs b/src/libboard_artiq/src/lib.rs
index 23e68362..c9f80d15 100644
--- a/src/libboard_artiq/src/lib.rs
+++ b/src/libboard_artiq/src/lib.rs
@@ -29,10 +29,10 @@ pub mod mem;
 #[rustfmt::skip]
 #[path = "../../../build/pl.rs"]
 pub mod pl;
-#[cfg(has_si5324)]
-pub mod si5324;
 #[cfg(has_drtio_eem)]
 pub mod drtio_eem;
+#[cfg(has_si5324)]
+pub mod si5324;
 
 use core::{cmp, str};
 
diff --git a/src/runtime/src/main.rs b/src/runtime/src/main.rs
index a2cbadc2..665e8e96 100644
--- a/src/runtime/src/main.rs
+++ b/src/runtime/src/main.rs
@@ -13,11 +13,11 @@ use core::cell::RefCell;
 
 use ksupport;
 use libasync::task;
+#[cfg(has_drtio_eem)]
+use libboard_artiq::drtio_eem;
 #[cfg(feature = "target_kasli_soc")]
 use libboard_artiq::io_expander;
 use libboard_artiq::{identifier_read, logger, pl};
-#[cfg(has_drtio_eem)]
-use libboard_artiq::drtio_eem;
 use libboard_zynq::{gic, mpcore, timer::GlobalTimer};
 use libconfig::Config;
 use libcortex_a9::l2c::enable_l2_cache;