2021-05-29 16:15:27 +08:00
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use libboard_zynq;
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use crate::artiq_raise;
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2020-09-06 00:38:28 +08:00
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2021-05-29 16:15:27 +08:00
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pub static mut I2C_BUS: Option<libboard_zynq::i2c::I2c> = None;
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2020-09-06 00:11:19 +08:00
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2021-05-29 16:15:27 +08:00
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pub extern fn start(busno: i32) {
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if busno > 0 {
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artiq_raise!("I2CError", "I2C bus could not be accessed");
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2020-09-06 00:11:19 +08:00
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}
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2021-05-29 16:15:27 +08:00
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unsafe {
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if (&mut I2C_BUS).as_mut().unwrap().start().is_err() {
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artiq_raise!("I2CError", "I2C start failed");
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2020-09-06 00:38:28 +08:00
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}
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2020-09-06 00:11:19 +08:00
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}
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2021-05-29 16:15:27 +08:00
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}
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2020-09-06 00:11:19 +08:00
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2021-05-29 16:15:27 +08:00
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pub extern fn restart(busno: i32) {
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if busno > 0 {
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artiq_raise!("I2CError", "I2C bus could not be accessed");
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2020-09-06 00:38:28 +08:00
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}
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2021-05-29 16:15:27 +08:00
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unsafe {
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if (&mut I2C_BUS).as_mut().unwrap().restart().is_err() {
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artiq_raise!("I2CError", "I2C restart failed");
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2020-09-06 00:38:28 +08:00
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}
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2020-09-06 00:11:19 +08:00
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}
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}
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2021-05-29 16:15:27 +08:00
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pub extern fn stop(busno: i32) {
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if busno > 0 {
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artiq_raise!("I2CError", "I2C bus could not be accessed");
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2020-09-06 00:38:28 +08:00
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}
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2021-05-29 16:15:27 +08:00
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unsafe {
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if (&mut I2C_BUS).as_mut().unwrap().stop().is_err() {
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artiq_raise!("I2CError", "I2C stop failed");
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}
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2020-09-06 00:11:19 +08:00
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}
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2021-05-29 16:15:27 +08:00
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}
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2020-09-06 00:11:19 +08:00
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2021-05-29 16:15:27 +08:00
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pub extern fn write(busno: i32, data: i32) -> bool {
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if busno > 0 {
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artiq_raise!("I2CError", "I2C bus could not be accessed");
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2020-09-06 00:38:28 +08:00
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}
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2021-05-29 16:15:27 +08:00
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unsafe {
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match (&mut I2C_BUS).as_mut().unwrap().write(data as u8) {
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Ok(r) => r,
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Err(_) => artiq_raise!("I2CError", "I2C write failed"),
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}
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2020-11-11 21:17:46 +08:00
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}
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2021-05-29 16:15:27 +08:00
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}
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2020-11-11 21:17:46 +08:00
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2021-05-29 16:15:27 +08:00
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pub extern fn read(busno: i32, ack: bool) -> i32 {
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if busno > 0 {
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artiq_raise!("I2CError", "I2C bus could not be accessed");
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2020-09-06 00:11:19 +08:00
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}
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2021-05-29 16:15:27 +08:00
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unsafe {
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match (&mut I2C_BUS).as_mut().unwrap().read(ack) {
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Ok(r) => r as i32,
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Err(_) => artiq_raise!("I2CError", "I2C read failed"),
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}
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2020-11-11 21:17:46 +08:00
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}
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2020-09-06 00:11:19 +08:00
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}
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2020-11-11 21:17:46 +08:00
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2021-05-29 16:15:27 +08:00
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pub fn init() {
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let mut i2c = libboard_zynq::i2c::I2c::i2c0();
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i2c.init().expect("I2C bus initialization failed");
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unsafe { I2C_BUS = Some(i2c) };
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}
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