From f021ebd6e6fa4db6efa892c96757cc8fa33ad5ec Mon Sep 17 00:00:00 2001 From: Astro Date: Thu, 12 Mar 2020 17:26:14 +0100 Subject: [PATCH] pins: setup PwmPins --- Cargo.lock | 17 +++--------- Cargo.toml | 3 ++- src/main.rs | 6 ++++- src/pins.rs | 78 ++++++++++++++++++++++++++++++++++++++++++++++++----- 4 files changed, 83 insertions(+), 21 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 8033f61..60d0568 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -209,12 +209,6 @@ version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f" -[[package]] -name = "rand_core" -version = "0.5.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "90bde5296fc891b0cef12a6d03ddccc162ce7b2aff54160af9338f8d40df6d19" - [[package]] name = "rustc_version" version = "0.2.3" @@ -260,7 +254,6 @@ checksum = "dba1a27d3efae4351c8051072d619e3ade2820635c3958d826bfea39d59b54c8" [[package]] name = "stm32-eth" version = "0.1.2" -source = "git+https://github.com/stm32-rs/stm32-eth.git#2c5dce379b85a31fb0b9c58a028b6454be1727aa" dependencies = [ "aligned", "log", @@ -271,9 +264,9 @@ dependencies = [ [[package]] name = "stm32f4" -version = "0.10.0" +version = "0.9.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "44a3d6c58b14e63926273694e7dd644894513c5e35ce6928c4657ddb62cae976" +checksum = "88640ad08c62e0651a1320187f38c3655d025ed580a10f0e4d85a2cc4829069f" dependencies = [ "bare-metal", "cortex-m", @@ -283,9 +276,8 @@ dependencies = [ [[package]] name = "stm32f4xx-hal" -version = "0.7.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "54abcca9b4abfb0d0518591ea39c2e14a0b07b9791548d4516ab5e61a83067cc" +version = "0.6.0" +source = "git+https://github.com/thalesfragoso/stm32f4xx-hal?branch=pwm-impl#ef939935b90581553dc03f9146d05510b3ceba58" dependencies = [ "bare-metal", "cast", @@ -293,7 +285,6 @@ dependencies = [ "cortex-m-rt", "embedded-hal", "nb", - "rand_core", "stm32f4", "void", ] diff --git a/Cargo.toml b/Cargo.toml index ebdbafb..c0e6b88 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -22,7 +22,8 @@ cortex-m = "0.6" cortex-m-rt = { version = "0.6", features = ["device"] } cortex-m-log = { version = "0.6", features = ["log-integration"] } embedded-hal = "0.2" -stm32f4xx-hal = { version = "0.7", features = ["rt", "stm32f427"] } +# TODO: pending https://github.com/stm32-rs/stm32f4xx-hal/pull/125 +stm32f4xx-hal = { git = "https://github.com/thalesfragoso/stm32f4xx-hal", branch = "pwm-impl", features = ["rt", "stm32f427"] } stm32-eth = { version = "0.1.2", features = ["smoltcp-phy"], git = "https://github.com/stm32-rs/stm32-eth.git" } smoltcp = { version = "0.6.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log"] } hash2hwaddr = { version = "0.0", optional = true } diff --git a/src/main.rs b/src/main.rs index 7f3869d..ebd5b49 100644 --- a/src/main.rs +++ b/src/main.rs @@ -73,7 +73,11 @@ fn main() -> ! { wd.start(WATCHDOG_INTERVAL.ms()); wd.feed(); - let pins = Pins::setup(clocks, dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOG, dp.SPI2); + let pins = Pins::setup( + clocks, dp.TIM1, dp.TIM3, + dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOE, dp.GPIOG, + dp.SPI2 + ); let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap(); diff --git a/src/pins.rs b/src/pins.rs index aa8b6c1..48f2ad9 100644 --- a/src/pins.rs +++ b/src/pins.rs @@ -1,17 +1,20 @@ use stm32f4xx_hal::{ gpio::{ AF5, Alternate, - gpioa::{PA1, PA2, PA7}, - gpiob::{PB10, PB11, PB12, PB13, PB14, PB15}, - gpioc::{PC1, PC4, PC5}, - gpiog::{PG13}, + gpioa::*, + gpiob::*, + gpioc::*, + gpioe::*, + gpiog::*, GpioExt, Output, PushPull, Speed::VeryHigh, }, rcc::Clocks, + pwm::{self, PwmChannels}, spi::Spi, - stm32::{GPIOA, GPIOB, GPIOC, GPIOG, SPI2}, + stm32::{GPIOA, GPIOB, GPIOC, GPIOE, GPIOG, SPI2, TIM1, TIM3}, + time::{U32Ext, Hertz}, }; @@ -21,14 +24,22 @@ type AdcSpi = Spi>, PB14>, PB15>, + pub pwm: PwmPins, } impl Pins { /// Setup GPIO pins and configure MCU peripherals - pub fn setup(clocks: Clocks, gpioa: GPIOA, gpiob: GPIOB, gpioc: GPIOC, gpiog: GPIOG, spi2: SPI2) -> Self { + pub fn setup( + clocks: Clocks, + tim1: TIM1, + tim3: TIM3, + gpioa: GPIOA, gpiob: GPIOB, gpioc: GPIOC, gpioe: GPIOE, gpiog: GPIOG, + spi2: SPI2 + ) -> Self { let gpioa = gpioa.split(); let gpiob = gpiob.split(); let gpioc = gpioc.split(); + let gpioe = gpioe.split(); let gpiog = gpiog.split(); Self::setup_ethernet( @@ -38,9 +49,18 @@ impl Pins { ); let adc_spi = Self::setup_spi_adc(clocks, spi2, gpiob.pb10, gpiob.pb14, gpiob.pb15); let adc_nss = gpiob.pb12.into_push_pull_output(); + + let pwm = PwmPins::setup( + clocks, tim1, tim3, + gpioc.pc6, gpioc.pc7, + gpioe.pe9, gpioe.pe11, + gpioe.pe13, gpioe.pe14 + ); + Pins { adc_spi, adc_nss, + pwm, } } @@ -91,3 +111,49 @@ impl Pins { pb13.into_alternate_af11().set_speed(VeryHigh); } } + +pub struct PwmPins { + max_v0: PwmChannels, + max_v1: PwmChannels, + max_i_pos0: PwmChannels, + max_i_pos1: PwmChannels, + max_i_neg0: PwmChannels, + max_i_neg1: PwmChannels, +} + +impl PwmPins { + fn setup( + clocks: Clocks, + tim1: TIM1, + tim3: TIM3, + max_v0: PC6, + max_v1: PC7, + max_i_pos0: PE9, + max_i_pos1: PE11, + max_i_neg0: PE13, + max_i_neg1: PE14, + ) -> PwmPins { + let freq = 20u32.khz(); + + let channels = ( + max_v0.into_alternate_af2(), + max_v1.into_alternate_af2(), + ); + let (max_v0, max_v1) = pwm::tim3(tim3, channels, clocks, freq); + + let channels = ( + max_i_pos0.into_alternate_af1(), + max_i_pos1.into_alternate_af1(), + max_i_neg0.into_alternate_af1(), + max_i_neg1.into_alternate_af1(), + ); + let (max_i_pos0, max_i_pos1, max_i_neg0, max_i_neg1) = + pwm::tim1(tim1, channels, clocks, freq); + + PwmPins { + max_v0, max_v1, + max_i_pos0, max_i_pos1, + max_i_neg0, max_i_neg1, + } + } +}