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libsupport_zynq: improve PrefetchAbort exception message

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mwojcik
2026-01-07 18:25:46 +08:00
parent 354c8a40a2
commit 6262cb135d
2 changed files with 11 additions and 2 deletions
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6
libcortex_a9/src/regs.rs
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@@ -107,9 +107,15 @@ register_bit!(mpidr,
pub struct DFAR;
def_reg_r!(DFAR, u32, "mrc p15, 0, {}, c6, c0, 0");
pub struct IFAR;
def_reg_r!(IFAR, u32, "mrc p15, 0, {}, c6, c0, 2");
pub struct DFSR;
def_reg_r!(DFSR, u32, "mrc p15, 0, {}, c5, c0, 0");
pub struct IFSR;
def_reg_r!(IFSR, u32, "mrc p15, 0, {}, c5, c0, 1");
pub struct SCTLR;
wrap_reg!(sctlr);
def_reg_r!(SCTLR, sctlr::Read, "mrc p15, 0, {}, c1, c0, 0");

7
libsupport_zynq/src/exception_vectors.rs
View File

@@ -2,7 +2,7 @@ use core::arch::naked_asm;
use libboard_zynq::{println, stdio};
use libcortex_a9::{interrupt_handler,
regs::{DFSR, MPIDR, VBAR}};
regs::{DFAR, DFSR, IFAR, IFSR, MPIDR, VBAR}};
use libregister::{RegisterR, RegisterW};
pub fn set_vector_table(base_addr: u32) {
@@ -35,7 +35,9 @@ interrupt_handler!(
interrupt_handler!(PrefetchAbort, prefetch_abort, __irq_stack0_start, __irq_stack1_start, {
stdio::drop_uart();
println!("PrefetchAbort");
println!("PrefetchAbort on core {}", MPIDR.read().cpu_id());
println!("IFSR: {:03X}", IFSR.read());
println!("IFAR: {:08X}", IFAR.read());
loop {}
});
@@ -44,6 +46,7 @@ interrupt_handler!(DataAbort, data_abort, __irq_stack0_start, __irq_stack1_start
println!("DataAbort on core {}", MPIDR.read().cpu_id());
println!("DFSR: {:03X}", DFSR.read());
println!("DFAR: {:08X}", DFAR.read());
loop {}
});