main: construct softspi

This commit is contained in:
Astro 2019-08-08 00:54:37 +02:00
parent 9c7ca0df87
commit 44f48f6e0f
3 changed files with 28 additions and 8 deletions

View File

@ -1,9 +1,9 @@
use cortex_m; use cortex_m;
use tm4c129x; use tm4c129x;
mod gpio; pub mod gpio;
mod softspi; pub mod softspi;
mod delay; pub mod delay;
const LED1: u8 = 0x10; // PK4 const LED1: u8 = 0x10; // PK4

View File

@ -74,7 +74,7 @@ impl<SCK: OutputPin, MOSI: OutputPin, MISO: InputPin> SoftSpi<SCK, MOSI, MISO> {
} }
} }
pub fn run<F: Fn()>(&mut self, delay: &'_ F) { pub fn run<F: FnMut()>(&mut self, delay: &'_ mut F) {
while self.state != State::Idle { while self.state != State::Idle {
self.tick(); self.tick();
delay(); delay();
@ -112,12 +112,16 @@ impl<SCK: OutputPin, MOSI: OutputPin, MISO: InputPin> FullDuplex<u8> for SoftSpi
} }
} }
pub struct SyncSoftSpi<'d, SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, D: Fn()> { pub struct SyncSoftSpi<'d, SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, D: FnMut()> {
spi: SoftSpi<SCK, MOSI, MISO>, spi: SoftSpi<SCK, MOSI, MISO>,
delay: &'d D, delay: &'d mut D,
}
impl<'d, SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, D: FnMut()> SyncSoftSpi<'d, SCK, MOSI, MISO, D> {
pub fn new(spi: SoftSpi<SCK, MOSI, MISO>, delay: &'d mut D) -> Self {
SyncSoftSpi { spi, delay }
} }
impl<'d, SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, D: Fn()> SyncSoftSpi<'d, SCK, MOSI, MISO, D> {
fn retry<R, E, F>(&mut self, f: &F) -> Result<R, E> fn retry<R, E, F>(&mut self, f: &F) -> Result<R, E>
where where
F: Fn(&'_ mut SoftSpi<SCK, MOSI, MISO>) -> Result<R, nb::Error<E>> F: Fn(&'_ mut SoftSpi<SCK, MOSI, MISO>) -> Result<R, nb::Error<E>>
@ -132,7 +136,7 @@ impl<'d, SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, D: Fn()> SyncSoftSpi<'
} }
} }
impl<'d, SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, D: Fn()> Transfer<u8> for SyncSoftSpi<'d, SCK, MOSI, MISO, D> { impl<'d, SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, D: FnMut()> Transfer<u8> for SyncSoftSpi<'d, SCK, MOSI, MISO, D> {
type Error = (); type Error = ();
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
for b in words.iter_mut() { for b in words.iter_mut() {

View File

@ -15,6 +15,8 @@ extern crate nb;
use core::cell::{Cell, RefCell}; use core::cell::{Cell, RefCell};
use core::fmt; use core::fmt;
use embedded_hal::digital::{InputPin, OutputPin};
use embedded_hal::blocking::delay::DelayUs;
use cortex_m::interrupt::Mutex; use cortex_m::interrupt::Mutex;
use smoltcp::time::Instant; use smoltcp::time::Instant;
use smoltcp::wire::EthernetAddress; use smoltcp::wire::EthernetAddress;
@ -44,6 +46,7 @@ pub fn panic_fmt(info: &core::panic::PanicInfo) -> ! {
#[macro_use] #[macro_use]
mod board; mod board;
use board::gpio::Gpio;
mod eeprom; mod eeprom;
mod config; mod config;
mod ethmac; mod ethmac;
@ -112,6 +115,19 @@ fn main() -> ! {
| | | |
|_| |_|
"#); "#);
let mut delay = board::delay::Delay::new();
// SCK
let pb4 = board::gpio::PB4.into_output();
// SCLK
let pb5 = board::gpio::PB5.into_output();
// MOSI
let pe4 = board::gpio::PE4.into_output();
// MISO
let pe5 = board::gpio::PE5.into_input();
let spi = board::softspi::SyncSoftSpi::new(
board::softspi::SoftSpi::new(pb4, pe4, pe5),
&mut || delay.delay_us(1u32)
);
let mut hardware_addr = EthernetAddress(board::get_mac_address()); let mut hardware_addr = EthernetAddress(board::get_mac_address());
if hardware_addr.is_multicast() { if hardware_addr.is_multicast() {