harry commented on issue harry/creotech-sayma-testsuite#1 2021-12-21 18:08:10 +08:00
Discussion: Test Protocol Design v.1

Closed and replaced with v.2 (#4).

harry closed issue harry/creotech-sayma-testsuite#1 2021-12-21 18:08:10 +08:00
Discussion: Test Protocol Design v.1
harry opened issue harry/creotech-sayma-testsuite#4 2021-12-21 18:07:37 +08:00
Discussion: Test Protocol Design v.2
harry pushed to master at harry/creotech-sayma-testsuite 2021-12-21 18:03:44 +08:00
c6f98f5856 test_{creotech,mlabs}: Remove RP power control
harry pushed to master at harry/creotech-sayma-testsuite 2021-12-21 17:50:34 +08:00
b473965a55 Add routing table for Creotech setup
harry pushed to master at harry/creotech-sayma-testsuite 2021-12-21 17:43:48 +08:00
e7785b4802 Add routing table for Creotech setup
harry pushed to fix-openocd-0.11 at harry/nix-scripts 2021-12-17 18:44:29 +08:00
e79318171b update misoc
c9efc20aeb switch everything to nixpkgs 21.05
f595103f17 conda: fix access to bscan-spi-bitstreams
2355ba148a openocd: use upstream nixpkgs version if recent enough
988d411946 mcu: simplify buildStm32Firmware
Compare 10 commits »
harry created branch fix-openocd-0.11 in harry/nix-scripts 2021-12-17 18:44:29 +08:00
harry pushed to master at harry/creotech-sayma-testsuite 2021-12-14 12:34:33 +08:00
f4b66ee2c0 analyze_sayma_data: Add max abs dev
harry commented on issue harry/creotech-sayma-testsuite#3 2021-12-02 11:06:12 +08:00
Test Report: Dual Sayma, DAC-to-DAC phase skew

DDMTD stability and HMC7043 phase slip failures need to be fully resolved before testing this.

In all previous test runs based off ARTIQ-7 (e.g. [single board DAC-DAC test on…

harry commented on issue harry/creotech-sayma-testsuite#3 2021-11-25 13:14:15 +08:00
Test Report: Dual Sayma, DAC-to-DAC phase skew

2021-11-25

Conditions

  • Hardware: unchanged, Sayma-2 AD9154-1 remain unused.
  • ARTIQ: unchanged
  • Testsuite: unchanged

Results

Sayma-1 AD9154-0 DAC1 -> Sayma-2 AD9154-1…
harry commented on issue harry/creotech-sayma-testsuite#3 2021-11-24 17:34:55 +08:00
Test Report: Dual Sayma, DAC-to-DAC phase skew

2021-11-24

Conditions

  • Hardware: Metlino as DRTIO master, 2 sets of Sayma (Sayma-1, Sayma-2) as DRTIO satellites (via uTCA carrier hub fabric)
    • Sayma-2 AD9154-1 is not…
harry opened issue harry/creotech-sayma-testsuite#3 2021-11-24 09:42:11 +08:00
Test Report: Dual Sayma, DAC-to-DAC phase skew
harry commented on issue harry/creotech-sayma-testsuite#2 2021-11-23 17:53:14 +08:00
Test Report: Single Sayma, DAC-to-DAC phase skew

2021-11-23

Conditions

  • Hardware: unchanged
  • ARTIQ: 96128743dc -- patched version of ARTIQ-7 (from…
harry created pull request M-Labs/it-infra#20 2021-10-27 12:25:25 +08:00
RT: Supress in-line display of plaintext attachments
harry pushed to rt-hide-textattachments at harry/it-infra 2021-10-27 12:20:11 +08:00
bcc5502ec6 rt: prevent text attachments from appearing inline on web interface
harry created branch rt-hide-textattachments in harry/it-infra 2021-10-27 12:20:11 +08:00
harry created repository harry/it-infra 2021-10-27 12:10:46 +08:00
harry pushed to master at M-Labs/nix-scripts 2021-10-13 17:14:04 +08:00
2d179ac712 artiq-full: build sias drtio system
harry commented on issue harry/creotech-sayma-testsuite#2 2021-10-07 17:09:33 +08:00
Test Report: Single Sayma, DAC-to-DAC phase skew

2021-10-06

Conditions

  • Hardware: unchanged
  • ARTIQ: unchanged
  • Testsuite: 97cfcdf45d4d8bde5519cb11c6c720cd5cb4f5ca, except:
    • In test_mlabs, all lines for RP power-cycling have…