zynq: power-cycle ZC706 before running tests

Like most trashy hardware of its kind, Zynq does not have a reliable reset.
This commit is contained in:
Sebastien Bourdeauducq 2020-07-05 23:18:06 +08:00
parent e623036a65
commit bba16a693e
1 changed files with 4 additions and 1 deletions

View File

@ -29,12 +29,15 @@ in
__networked = true; __networked = true;
buildInputs = [ buildInputs = [
pkgs.openssh pkgs.rsync artiq-fast.artiq pkgs.netcat pkgs.openssh pkgs.rsync artiq-fast.artiq
]; ];
phases = [ "buildPhase" ]; phases = [ "buildPhase" ];
buildPhase = buildPhase =
'' ''
(echo b; sleep 5; echo B) | nc -N 192.168.1.31 3131
sleep 5
export USER=hydra export USER=hydra
pushd ${<artiq-zynq>} pushd ${<artiq-zynq>}
bash ${<artiq-zynq>}/remote_run.sh -h rpi-4 -o "-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_rsa" -d ${artiq-zynq.zc706-simple-jtag} bash ${<artiq-zynq>}/remote_run.sh -h rpi-4 -o "-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_rsa" -d ${artiq-zynq.zc706-simple-jtag}