harry/creotech-sayma-testsuite
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Harry Ho fa0b190234 [WIP] Add preliminary ARTIQ scripts for ST1, ST2 
* For ST2, add the argument `ttl_use_fpga=true` to disable generating 111ns pulses on the TTLs.
2021-03-09 17:02:10 +08:00
artiq_exp [WIP] Add preliminary ARTIQ scripts for ST1, ST2 2021-03-09 17:02:10 +08:00
99-local.rules Add /etc/udev/rules.d rules 2021-02-22 17:41:40 +08:00
mch_start Add MCH control/logging scripts 2021-02-22 17:41:48 +08:00
mch_stop Add MCH control/logging scripts 2021-02-22 17:41:48 +08:00
plot_sayma_data.py Add RP data collection/plotting scripts 2021-02-22 17:43:48 +08:00
README Initial commit 2021-02-22 17:39:27 +08:00
rp_get_sayma_data.py Add RP data collection/plotting scripts 2021-02-22 17:43:48 +08:00

README