harry/creotech-sayma-testsuite
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Harry Ho 64e85fc143 [WIP] Simplify ARTIQ scripts for DAC & TTL sync tests 
* A single `SyncDDSTTL` experiment definition can be used to test DAC and TTL outputs.
* For ST1/ST3, simply run this on Sayma gateware that produces hardcoded waves at SAWGs.
* For ST2/ST4, either:
  * simply run this on Sayma gateware that produces hardcoded waves at both SAWGs and TTLs; or
  * set `gen_ttl_wave=true` and run this on Sayma gateware that produces hardcoded waves at SAWGs only, while both MCXs are used as TTLOuts.
2021-04-12 16:15:04 +08:00
artiq_exp [WIP] Simplify ARTIQ scripts for DAC & TTL sync tests 2021-04-12 16:15:04 +08:00
99-local.rules Add /etc/udev/rules.d rules 2021-02-22 17:41:40 +08:00
get_and_plot_remote_sayma_data Add gain control & options for data collection/plotting; fix doc 2021-04-12 15:03:01 +08:00
mch_start mch_start: Improve message 2021-04-12 15:03:01 +08:00
mch_stop Add MCH control/logging scripts 2021-02-22 17:41:48 +08:00
plot_sayma_data.py Add gain control & options for data collection/plotting; fix doc 2021-04-12 15:03:01 +08:00
README Initial commit 2021-02-22 17:39:27 +08:00
rp_get_sayma_data.py Add gain control & options for data collection/plotting; fix doc 2021-04-12 15:03:01 +08:00

README