Commit Graph

3 Commits

Author SHA1 Message Date
64e85fc143 [WIP] Simplify ARTIQ scripts for DAC & TTL sync tests
* A single `SyncDDSTTL` experiment definition can be used to test DAC and TTL outputs.
* For ST1/ST3, simply run this on Sayma gateware that produces hardcoded waves at SAWGs.
* For ST2/ST4, either:
  * simply run this on Sayma gateware that produces hardcoded waves at both SAWGs and TTLs; or
  * set `gen_ttl_wave=true` and run this on Sayma gateware that produces hardcoded waves at SAWGs only, while both MCXs are used as TTLOuts.
2021-04-12 16:15:04 +08:00
fa0b190234 [WIP] Add preliminary ARTIQ scripts for ST1, ST2
* For ST2, add the argument `ttl_use_fpga=true` to disable generating 111ns pulses on the TTLs.
2021-03-09 17:02:10 +08:00
a0d92497a9 Add ARTIQ device DB 2021-03-09 09:54:33 +08:00