forked from M-Labs/zynq-rs
300 lines
9.2 KiB
Rust
300 lines
9.2 KiB
Rust
#![no_std]
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#![no_main]
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extern crate alloc;
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use core::{mem::transmute, task::Poll};
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use alloc::{borrow::ToOwned, collections::BTreeMap, format};
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use log::info;
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use libcortex_a9::{mutex::Mutex, sync_channel::{self, sync_channel}};
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use libboard_zynq::{
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print, println,
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self as zynq, clocks::Clocks, clocks::source::{ClockSource, ArmPll, IoPll},
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smoltcp::{
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self,
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wire::{EthernetAddress, IpAddress, IpCidr},
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iface::{NeighborCache, EthernetInterfaceBuilder, Routes},
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time::Instant,
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socket::SocketSet,
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socket::{TcpSocket, TcpSocketBuffer},
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},
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};
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use libsupport_zynq::{
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ram, alloc::{vec, vec::Vec},
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boot,
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};
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use libasync::{smoltcp::{Sockets, TcpStream}, task};
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mod ps7_init;
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const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef];
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static mut STACK_CORE1: [u32; 512] = [0; 512];
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#[no_mangle]
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pub fn main_core0() {
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// zynq::clocks::CpuClocks::enable_io(1_250_000_000);
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println!("\nzc706 main");
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libsupport_zynq::logger::init().unwrap();
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log::set_max_level(log::LevelFilter::Trace);
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{
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use libregister::RegisterR;
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info!("Boot mode: {:?}", zynq::slcr::RegisterBlock::new().boot_mode.read().boot_mode_pins());
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}
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#[cfg(feature = "target_zc706")]
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const CPU_FREQ: u32 = 800_000_000;
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#[cfg(feature = "target_cora_z7_10")]
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const CPU_FREQ: u32 = 650_000_000;
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println!("Setup clock sources...");
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ArmPll::setup(2 * CPU_FREQ);
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Clocks::set_cpu_freq(CPU_FREQ);
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#[cfg(feature = "target_zc706")]
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{
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IoPll::setup(1_000_000_000);
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libboard_zynq::stdio::drop_uart();
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}
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println!("PLLs set up");
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let clocks = zynq::clocks::Clocks::get();
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println!("CPU Clocks: {}/{}/{}/{}", clocks.cpu_6x4x(), clocks.cpu_3x2x(), clocks.cpu_2x(), clocks.cpu_1x());
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let mut flash = zynq::flash::Flash::new(200_000_000).linear_addressing_mode();
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let flash_ram: &[u8] = unsafe { core::slice::from_raw_parts(flash.ptr(), flash.size()) };
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for i in 0..=1 {
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print!("Flash {}:", i);
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for b in &flash_ram[(i * 16 * 1024 * 1024)..][..128] {
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print!(" {:02X}", *b);
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}
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println!("");
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}
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let mut flash = flash.stop();
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let mut ddr = zynq::ddr::DdrRam::new();
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#[cfg(not(feature = "target_zc706"))]
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ddr.memtest();
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ram::init_alloc(&mut ddr);
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for i in 0..=1 {
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let mut flash_io = flash.manual_mode(i);
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// println!("rdcr={:02X}", flash_io.rdcr());
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print!("Flash {} ID:", i);
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for b in flash_io.rdid() {
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print!(" {:02X}", b);
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}
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println!("");
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print!("Flash {} I/O:", i);
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for o in 0..8 {
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const CHUNK: u32 = 8;
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for b in flash_io.read(CHUNK * o, CHUNK as usize) {
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print!(" {:02X}", b);
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}
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}
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println!("");
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flash_io.dump("Read cr1", 0x35);
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flash_io.dump("Read Autoboot", 0x14);
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flash_io.dump("Read Bank", 0x16);
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flash_io.dump("DLP Bank", 0x16);
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flash_io.dump("Read ESig", 0xAB);
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flash_io.dump("OTP Read", 0x4B);
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flash_io.dump("DYB Read", 0xE0);
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flash_io.dump("PPB Read", 0xE2);
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flash_io.dump("ASP Read", 0x2B);
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flash_io.dump("Password Read", 0xE7);
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flash_io.write_enabled(|flash_io| {
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flash_io.erase(0);
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});
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flash_io.write_enabled(|flash_io| {
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flash_io.program(0, [0x23054223; (0x100 >> 2)].iter().cloned());
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});
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flash = flash_io.stop();
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}
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let (mut tx, mut rx) = sync_channel::sync_channel(0);
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task::spawn(async move {
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println!("outer task");
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while let Some(item) = *rx.async_recv().await {
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println!("received {}", item);
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}
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});
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task::spawn(async {
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for i in 1..=3 {
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println!("outer task2: {}", i);
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task::r#yield().await;
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}
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});
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task::block_on(async {
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task::spawn(async {
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println!("inner task");
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});
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for i in 1..=10 {
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println!("yield {}", i);
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task::r#yield().await;
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tx.async_send(Some(i)).await;
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}
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tx.async_send(None).await;
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});
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let core1_stack = unsafe { &mut STACK_CORE1[..] };
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println!("{} bytes stack for core1", core1_stack.len());
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let core1 = boot::Core1::start(core1_stack);
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let (mut core1_req, rx) = sync_channel(10);
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*CORE1_REQ.lock() = Some(rx);
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let (tx, mut core1_res) = sync_channel(10);
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*CORE1_RES.lock() = Some(tx);
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task::block_on(async {
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for i in 0..10 {
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core1_req.async_send(i).await;
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let j = core1_res.async_recv().await;
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println!("{} -> {}", i, j);
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}
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});
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core1.disable();
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libcortex_a9::asm::dsb();
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print!("Core1 stack [{:08X}..{:08X}]:", &core1.stack[0] as *const _ as u32, &core1.stack[core1.stack.len() - 1] as *const _ as u32);
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for w in core1.stack {
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print!(" {:08X}", w);
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}
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println!(".");
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let eth = zynq::eth::Eth::default(HWADDR.clone());
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println!("Eth on");
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const RX_LEN: usize = 8;
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let mut rx_descs = (0..RX_LEN)
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.map(|_| zynq::eth::rx::DescEntry::zeroed())
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.collect::<Vec<_>>();
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let mut rx_buffers = vec![zynq::eth::Buffer::new(); RX_LEN];
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// Number of transmission buffers (minimum is two because with
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// one, duplicate packet transmission occurs)
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const TX_LEN: usize = 8;
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let mut tx_descs = (0..TX_LEN)
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.map(|_| zynq::eth::tx::DescEntry::zeroed())
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.collect::<Vec<_>>();
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let mut tx_buffers = vec![zynq::eth::Buffer::new(); TX_LEN];
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let eth = eth.start_rx(&mut rx_descs, &mut rx_buffers);
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// let mut eth = eth.start_tx(&mut tx_descs, &mut tx_buffers);
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let mut eth = eth.start_tx(
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// HACK
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unsafe { transmute(tx_descs.as_mut_slice()) },
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unsafe { transmute(tx_buffers.as_mut_slice()) },
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);
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// loop {
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// match eth.recv_next() {
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// Ok(None) => {},
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// Ok(Some(pkt)) => println!("received {} bytes", pkt.len()),
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// Err(e) => println!("e: {:?}", e),
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// }
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// }
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println!("iface...");
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let ethernet_addr = EthernetAddress(HWADDR);
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// IP stack
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let local_addr = IpAddress::v4(192, 168, 1, 51);
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let mut ip_addrs = [IpCidr::new(local_addr, 24)];
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let mut routes_storage = vec![None; 4];
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let routes = Routes::new(/*BTreeMap::new()*/ &mut routes_storage[..]);
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let mut neighbor_storage = vec![None; 256];
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let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
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let mut iface = EthernetInterfaceBuilder::new(&mut eth)
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.ethernet_addr(ethernet_addr)
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.ip_addrs(&mut ip_addrs[..])
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.routes(routes)
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.neighbor_cache(neighbor_cache)
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.finalize();
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// TODO: compare with ps7_init
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Sockets::init(32);
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/// `chargen`
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const TCP_PORT: u16 = 19;
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async fn handle_connection(stream: TcpStream) -> smoltcp::Result<()> {
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stream.send("Enter your name: ".bytes()).await?;
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let name = stream.recv(|buf| {
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for (i, b) in buf.iter().enumerate() {
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if *b == '\n' as u8 {
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return match core::str::from_utf8(&buf[0..i]) {
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Ok(name) =>
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Poll::Ready((i + 1, Some(name.to_owned()))),
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Err(_) =>
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Poll::Ready((i + 1, None))
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};
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}
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}
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if buf.len() > 100 {
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// Too much input, consume all
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Poll::Ready((buf.len(), None))
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} else {
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Poll::Pending
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}
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}).await?;
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match name {
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Some(name) =>
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stream.send(format!("Hello {}!\n", name).bytes()).await?,
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None =>
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stream.send("I had trouble reading your name.\n".bytes()).await?,
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}
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stream.flush().await;
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Ok(())
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}
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let mut counter = alloc::rc::Rc::new(core::cell::RefCell::new(0));
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task::spawn(async move {
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while let stream = TcpStream::accept(TCP_PORT, 2048, 2408).await.unwrap() {
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let counter = counter.clone();
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task::spawn(async move {
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*counter.borrow_mut() += 1;
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println!("Serving {} connections", *counter.borrow());
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handle_connection(stream)
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.await
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.map_err(|e| println!("Connection: {:?}", e));
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*counter.borrow_mut() -= 1;
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println!("Now serving {} connections", *counter.borrow());
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});
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}
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});
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let mut time = 0u32;
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Sockets::run(&mut iface, || {
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time += 1;
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Instant::from_millis(time)
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})
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}
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static CORE1_REQ: Mutex<Option<sync_channel::Receiver<usize>>> = Mutex::new(None);
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static CORE1_RES: Mutex<Option<sync_channel::Sender<usize>>> = Mutex::new(None);
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static DONE: Mutex<bool> = Mutex::new(false);
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#[no_mangle]
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pub fn main_core1() {
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println!("Hello from core1!");
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let mut req = None;
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while req.is_none() {
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req = CORE1_REQ.lock().take();
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}
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let mut req = req.unwrap();
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let mut res = None;
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while res.is_none() {
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res = CORE1_RES.lock().take();
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}
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let mut res = res.unwrap();
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for i in req {
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res.send(*i * *i);
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}
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println!("core1 done!");
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*DONE.lock() = true;
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loop {}
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}
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