forked from M-Labs/zynq-rs
extend linker script
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d10ffe9eb9
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@ -2,7 +2,7 @@
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runner = "./runner.sh"
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linker = "arm-none-eabihf-gcc"
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rustflags = [
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"-C", "link-arg=-Wl,-Tlink.x",
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"-C", "link-arg=-Wl,-Tlink.x,-N",
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"-C", "target-feature=a9,armv7-a,neon",
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"-C", "target-cpu=cortex-a9",
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]
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60
link.x
60
link.x
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@ -1,57 +1,49 @@
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ENTRY(_boot_cores);
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/* SECTIONS */
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/* { */
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/* . = 0x8000; */
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/* .text : */
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/* { */
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/* KEEP(*(.text.boot)) *(.text .text.*) */
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/* } */
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/* /DISCARD/ : { *(.comment) *(.gnu*) *(.note*) *(.eh_frame*) } */
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/* } */
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STACK_SIZE = 0x2000 - 0x10;
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MEMORY
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{
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/* 256 kB On-Chip Memory */
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OCM : ORIGIN = 0, LENGTH = 0x40000
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}
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SECTIONS
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{
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/* Starts at LOADER_ADDR. */
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. = 0x8000;
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__start = .;
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__text_start = .;
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.text :
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{
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/* Starts at LOADER_ADDR. */
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. = 0x8000;
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KEEP(*(.text.boot))
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*(.text)
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}
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. = ALIGN(4096); /* align to page size */
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__text_end = .;
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*(.text .text.*)
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. = ALIGN(4096); /* align to page size */
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} > OCM
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__rodata_start = .;
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.rodata :
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{
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*(.rodata)
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}
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. = ALIGN(4096); /* align to page size */
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__rodata_end = .;
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. = ALIGN(4096); /* align to page size */
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} > OCM
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__data_start = .;
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.data :
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{
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*(.data)
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}
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. = ALIGN(4096); /* align to page size */
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__data_end = .;
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. = ALIGN(4096); /* align to page size */
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} > OCM
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__bss_start = .;
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.bss :
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.bss (NOLOAD) :
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{
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bss = .;
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*(.bss)
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}
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. = ALIGN(4096); /* align to page size */
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__bss_end = .;
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__end = .;
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. = ALIGN(4096); /* align to page size */
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} > OCM
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__bss_start = ADDR(.bss);
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__bss_end = ADDR(.bss) + SIZEOF(.bss);
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.stack (NOLOAD) : {
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. += STACK_SIZE;
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} > OCM
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__stack_end = ADDR(.stack);
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__stack_start = ADDR(.stack) + SIZEOF(.stack);
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/DISCARD/ :
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{
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@ -30,10 +30,16 @@ macro_rules! def_reg_set {
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}
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}
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/// Stack Pointer
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pub struct SP;
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def_reg_get!(SP, u32, "mov $0, sp");
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def_reg_set!(SP, u32, "mov sp, $0");
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/// Link register (function call return address)
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pub struct LR;
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def_reg_get!(LR, u32, "mov $0, lr");
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def_reg_set!(LR, u32, "mov lr, $0");
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pub struct MPIDR;
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def_reg_get!(MPIDR, u32, "mrc p15, 0, $0, c0, c0, 5");
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@ -20,7 +20,7 @@ use crate::cortex_a9::{asm, regs::*};
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extern "C" {
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static mut __bss_start: u32;
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static mut __bss_end: u32;
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static mut __end: u32;
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static mut __stack_start: u32;
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}
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#[link_section = ".text.boot"]
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@ -28,11 +28,10 @@ extern "C" {
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#[naked]
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pub unsafe extern "C" fn _boot_cores() -> ! {
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const CORE_MASK: u32 = 0x3;
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let stack_start = __end + 4096;
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match MPIDR.get() & CORE_MASK {
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0 => {
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SP.set(stack_start);
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SP.set(&mut __stack_start as *mut _ as u32);
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boot_core0();
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}
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_ => loop {
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