forked from M-Labs/nix-servo
271 lines
8.8 KiB
Python
271 lines
8.8 KiB
Python
# This file is part of Fast Servo Software Package.
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#
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# Copyright (C) 2023 Jakub Matyas
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# Warsaw University of Technology <jakubk.m@gmail.com>
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# SPDX-License-Identifier: GPL-3.0-or-later
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <https://www.gnu.org/licenses/>.
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# Additional Reference:
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# https://github.com/torvalds/linux/blob/master/drivers/clk/clk-si5341.c
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import time
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from smbus2 import SMBus
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BUS_NO = 0
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IC_ADDR = 0x74
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DEVICE_READY = 0x00FE
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PLL_M_DEN = 0x023B
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STATUS = 0x000C
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STATUS_STICKY = 0x0011
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STATUS_LOSREF = 0x04
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STATUS_LOL = 0x08
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def write_preamble(bus):
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preamble = [
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(0x0B24, 0xC0),
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(0x0B25, 0x00),
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(0x0502, 0x01),
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(0x0505, 0x03),
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(0x0957, 0x17),
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(0x0B4E, 0x1A),
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]
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for address, value in preamble:
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bus.write_byte_data(IC_ADDR, address, value)
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def write_postamble(bus):
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postamble = [
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(0x001C, 0x01), # Soft reset
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(0x0B24, 0xC3),
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(0x0B25, 0x02),
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]
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for address, value in postamble:
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bus.write_byte_data(IC_ADDR, address, value)
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def wait_device_ready(bus):
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for _ in range(15):
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if bus.read_byte_data(IC_ADDR, DEVICE_READY) == 0x0F:
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return True
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time.sleep(0.02)
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return False
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def wait_for_lock(bus):
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for _ in range(10):
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status = bus.read_byte_data(IC_ADDR, STATUS)
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if not (status & (STATUS_LOSREF | STATUS_LOL)):
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return True
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time.sleep(0.01)
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return False
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def check_pll_status(bus):
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pll_status = bus.read_byte_data(IC_ADDR, 0x0C)
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pll_locked = not (pll_status & STATUS_LOL)
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print(f"PLL {'locked' if pll_locked else 'unlocked'}")
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return pll_locked
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def check_los_status(bus):
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los_status = bus.read_byte_data(IC_ADDR, 0x0D)
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xaxb_los = (los_status & 0x10) != 0
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print(f"XA/XB LOS {'asserted' if xaxb_los else 'deasserted'}")
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return not xaxb_los
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def configure_si5340():
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with SMBus(BUS_NO) as bus:
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if not wait_device_ready(bus):
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print("Device not ready. Aborting.")
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return
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# Programming sequence from ClockBuilder Pro, default settings
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# to initialize system using XTAL input
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main_config = [
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(0x0006, 0x00), # TOOL_VERSION
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(0x0007, 0x00), # Not in datasheet
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(0x0008, 0x00), # Not in datasheet
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(0x000B, 0x74), # I2C_ADDR
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(0x0017, 0xD0), # INT mask (disable interrupts)
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(0x0018, 0xFF), # INT mask
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(0x0021, 0x0F), # Select XTAL as input
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(0x0022, 0x00), # Not in datasheet
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(0x002B, 0x02), # SPI config
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(0x002C, 0x20), # LOS enable for XTAL
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(0x002D, 0x00), # LOS timing
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(0x002E, 0x00), # LOS trigger (thresholds)
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(0x002F, 0x00),
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(0x0030, 0x00),
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(0x0031, 0x00),
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(0x0032, 0x00),
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(0x0033, 0x00),
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(0x0034, 0x00),
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(0x0035, 0x00), # LOS trigger (thresholds) end
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(0x0036, 0x00), # LOS clear (thresholds)
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(0x0037, 0x00),
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(0x0038, 0x00),
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(0x0039, 0x00),
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(0x003A, 0x00),
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(0x003B, 0x00),
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(0x003C, 0x00),
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(0x003D, 0x00), # LOS clear (thresholds) end
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(0x0041, 0x00), # LOS0_DIV_SEL
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(0x0042, 0x00), # LOS1_DIV_SEL
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(0x0043, 0x00), # LOS2_DIV_SEL
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(0x0044, 0x00), # LOS3_DIV_SEL
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(0x009E, 0x00), # LOL_SET_THR
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(0x0102, 0x01), # Enable outputs
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(0x013F, 0x00), # OUTX_ALWAYS_ON
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(0x0140, 0x00), # OUTX_ALWAYS_ON
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(0x0141, 0x40), # OUT_DIS_LOL_MSK, OUT_DIS_MSK_LOS_PFD
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(0x0202, 0x00), # XAXB_FREQ_OFFSET (=0)
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# PLL Configuration
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(0x0235, 0x00), # M_NUM
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(0x0236, 0x00),
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(0x0237, 0x00),
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(0x0238, 0x80),
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(0x0239, 0x89),
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(0x023A, 0x00),
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(0x023B, 0x00), # M_DEN
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(0x023C, 0x00),
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(0x023D, 0x00),
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(0x023E, 0x80),
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# Synthesizer configuration
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(0x0302, 0x00), # N0_NUM
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(0x0303, 0x00),
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(0x0304, 0x00),
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(0x0305, 0x00),
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(0x0306, 0x21),
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(0x0307, 0x00),
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(0x0308, 0x00), # N0_DEN
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(0x0309, 0x00),
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(0x030A, 0x00),
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(0x030B, 0x80),
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(0x030C, 0x01), # N0_UPDATE
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# N1 Configuration (1:1 ratio)
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(0x030D, 0x00), # N1_NUM
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(0x030E, 0x00),
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(0x030F, 0x00),
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(0x0310, 0x00),
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(0x0311, 0x00),
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(0x0312, 0x01),
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(0x0313, 0x00), # N1_DEN
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(0x0314, 0x00),
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(0x0315, 0x00),
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(0x0316, 0x01),
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(0x0317, 0x01), # N1_UPDATE
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# N2 Configuration (1:1 ratio)
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(0x0318, 0x00), # N2_NUM
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(0x0319, 0x00),
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(0x031A, 0x00),
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(0x031B, 0x00),
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(0x031C, 0x00),
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(0x031D, 0x01),
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(0x031E, 0x00), # N2_DEN
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(0x031F, 0x00),
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(0x0320, 0x00),
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(0x0321, 0x01),
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(0x0322, 0x01), # N2_UPDATE
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# N3 Configuration (1:1 ratio)
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(0x0323, 0x00), # N3_NUM
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(0x0324, 0x00),
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(0x0325, 0x00),
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(0x0326, 0x00),
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(0x0327, 0x00),
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(0x0328, 0x01),
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(0x0329, 0x00), # N3_DEN
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(0x032A, 0x00),
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(0x032B, 0x00),
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(0x032C, 0x01),
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(0x032D, 0x01), # N3_UPDATE
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# Output configuration
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(0x0112, 0x06), # OUT0 config
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(0x0113, 0x09), # OUT0 format
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(0x0114, 0x3B), # OUT0 CM/AMPL
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(0x0115, 0x28), # OUT0 MUX_SEL
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(0x0117, 0x06), # OUT1 config
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(0x0118, 0x09), # OUT1 format
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(0x0119, 0x3B), # OUT1 CM/AMPL
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(0x011A, 0x28), # OUT1 MUX_SEL
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(0x0126, 0x06), # OUT2 config
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(0x0127, 0x09), # OUT2 format
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(0x0128, 0x3B), # OUT2 CM/AMPL
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(0x0129, 0x28), # OUT2 MUX_SEL
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(0x012B, 0x06), # OUT3 config
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(0x012C, 0xCC), # OUT3 format
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(0x012D, 0x00), # OUT3 CM/AMPL
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(0x012E, 0x58), # OUT3 MUX_SEL
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# Miscellaneous configuration
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(0x090E, 0x02), # XAXB_EXTCLK_EN=0 XAXB_PDNB=1 (use XTAL)
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(0x091C, 0x04), # ZDM_EN=4 (Normal mode)
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(0x0943, 0x00), # IO_VDD_SEL
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(0x0949, 0x00), # IN_EN (disable input clocks)
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(0x094A, 0x00), # INx_TO_PFD_EN (disabled)
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(0x094E, 0x49), # REFCLK_HYS_SEL (set by CBPro)
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(0x094F, 0x02), # Not in datasheet
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(0x095E, 0x00), # M_INTEGER (set by CBPro)
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(0x0A02, 0x00), # N_ADD_0P5 (set by CBPro)
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(0x0A03, 0x01), # N_CLK_TO_OUTX_EN
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(0x0A04, 0x01), # N_PIBYP
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(0x0A05, 0x01), # N_PDNB
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(0x0A14, 0x00), # N0_HIGH_FREQ (set by CBPro)
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(0x0A1A, 0x00), # N1_HIGH_FREQ (set by CBPro)
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(0x0A20, 0x00), # N2_HIGH_FREQ (set by CBPro)
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(0x0A26, 0x00), # N3_HIGH_FREQ (set by CBPro)
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(0x0B44, 0x0F), # PDIV_ENB (set by CBPro)
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(0x0B4A, 0x0E), # N_CLK_DIS
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(0x0B57, 0x0E), # VCO_RESET_CALCODE (set by CBPro)
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(0x0B58, 0x01), # VCO_RESET_CALCODE (set by CBPro)
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]
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write_preamble(bus)
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time.sleep(0.3)
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print("Writing main configuration...")
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for address, value in main_config:
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bus.write_byte_data(IC_ADDR, address, value)
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print("Main configuration written")
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write_postamble(bus)
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if not wait_for_lock(bus):
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print("Error waiting for input clock or PLL lock")
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else:
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print("Input clock present and PLL locked")
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bus.write_byte_data(IC_ADDR, STATUS_STICKY, 0)
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# Final status check
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pll_locked = check_pll_status(bus)
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xaxb_signal_present = check_los_status(bus)
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if not pll_locked:
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print("Error: PLL is not locked")
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elif not xaxb_signal_present:
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print("Error: XA/XB signal is lost")
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else:
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print("Si5340 configuration completed successfully")
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if __name__ == "__main__":
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configure_si5340() |