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pyfastservo: fix dac init script and cleanup

This commit is contained in:
Florian Agbuya 2024-06-28 11:59:23 +08:00
parent 61fa18fb18
commit 8506da0128
1 changed files with 77 additions and 111 deletions
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186
fast-servo/pyfastservo/dac.py
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@ -17,8 +17,7 @@
# You should have received a copy of the GNU General Public License # You should have received a copy of the GNU General Public License
# along with this program. If not, see <https://www.gnu.org/licenses/>. # along with this program. If not, see <https://www.gnu.org/licenses/>.
import mmap import time
import os
import spidev import spidev
from pyfastservo.common import ( from pyfastservo.common import (
@ -29,108 +28,58 @@ from pyfastservo.common import (
CTRL_ADDR, CTRL_ADDR,
MAP_MASK, MAP_MASK,
PAGESIZE, PAGESIZE,
write_to_memory,
read_from_memory
) )
# /dev/spidev2.0 <=> spidev<BUS>.<DEVICE> # /dev/spidev2.0 <=> spidev<BUS>.<DEVICE>
MAIN_DAC_BUS = 2 MAIN_DAC_BUS = 2
MAIN_DAC_DEVICE = 0 MAIN_DAC_DEVICE = 0
DAC_VERSION = 0x0A DAC_VERSION = 0x0A
def main_dac_init(): def spi_write(spi, address, value):
spi = spidev.SpiDev() spi.xfer2([address, value])
try: def spi_read(spi, address):
spi.open(MAIN_DAC_BUS, MAIN_DAC_DEVICE) rx_buffer = spi.xfer2([0x80 | address, 0x00])
spi.max_speed_hz = 5000 return rx_buffer[1]
spi.mode = 0b00 # CPOL = 0 CPHA = 0
spi.cshigh = False
spi_buffer = [0x00, 0x10] # software reset def hard_reset(spi):
spi.xfer2(spi_buffer) spi_write(spi, 0x00, 0x10) # Software reset
spi_write(spi, 0x00, 0x00) # Release software reset
spi_read(spi, 0x00) # Read reset address (necessary for reset to take effect)
spi_buffer = [0x00, 0x00] # release software reset def check_version(spi):
spi.xfer2(spi_buffer) version = spi_read(spi, 0x1F)
print(f"DAC version: 0x{version:02X}")
return version == DAC_VERSION
spi_buffer = [ def configure_dac(spi):
0x80, power_down_reg = spi_read(spi, 0x01)
0x00, spi_write(spi, 0x01, power_down_reg & ~(1 << 0)) # Clear EXTREF bit for internal reference
] # for some reason it is needed to read the reset address for reset to actually reset spi_write(spi, 0x0D, 0x00) # Set RREF to 10 kΩ for 1.0V reference
rx_buffer = spi.xfer2(spi_buffer) spi_write(spi, 0x04, 0xA0) # Enable on-chip IRSET (1.6 kΩ for 20mA output)
spi_write(spi, 0x07, 0xA0) # Enable on-chip QRSET (1.6 kΩ for 20mA output)
spi_write(spi, 0x05, 0x00) # Disable internal IRCML
spi_write(spi, 0x08, 0x00) # Disable internal QRCML
spi_write(spi, 0x02, 0xB4) # Enable 2's complement, LVDS interface, 4 LVDS lanes
spi_buffer = [0x9F, 0x00] # hardware version def dac_self_calibration(spi):
rx_buffer = spi.xfer2(spi_buffer) spi_write(spi, 0x12, 0x00) # Reset calibration status
if rx_buffer[1] != DAC_VERSION: spi_write(spi, 0x0E, 0x08) # Enable calibration clock, default divide ratio
print(f"Unrecognized device: 0x{rx_buffer[1]:02X}") spi_write(spi, 0x0E, 0x38) # CALSELI = 1, CALSELQ = 1, CALCLK = 1
spi_write(spi, 0x12, 0x10) # Set CALEN bit
print("=== Contents of spi buffer after DAC VERSION read back: ===") while True:
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}") status = spi_read(spi, 0x0F)
if status & 0xC0 == 0xC0: # Both CALSTATI and CALSTATQ are 1
spi_buffer = [0x82, 00] break
rx_buffer = spi.xfer2(spi_buffer) time.sleep(0.01)
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
# set to 2's complement and I to be first of pair on data input pads
spi_buffer = [0x02, 0xB4]
rx_buffer = spi.xfer2(spi_buffer)
spi_buffer = [0x82, 00]
rx_buffer = spi.xfer2(spi_buffer)
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
for i in range(10):
spi_buffer = [0x94, 0x00]
rx_buffer = spi.xfer2(spi_buffer)
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
finally:
spi.close()
def read_from_memory(address, n_bytes):
assert n_bytes <= 4
addr = address
try:
f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
with mmap.mmap(
f,
PAGESIZE,
mmap.MAP_SHARED,
mmap.PROT_READ | mmap.PROT_WRITE,
offset=addr & ~MAP_MASK,
) as mem:
start_addr = addr & MAP_MASK
stop_addr = start_addr + 4
# print(f"addr: 0x{addr:x}\tstart_addr: 0x{start_addr}\tstop_addr: 0x{stop_addr}")
contents = mem[start_addr:stop_addr]
read_value = list(contents)[:n_bytes]
finally:
os.close(f)
return read_value
def write_to_memory(address, value):
value_bytes = value.to_bytes(4, "little")
addr = address
try:
f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
with mmap.mmap(
f,
PAGESIZE,
mmap.MAP_SHARED,
mmap.PROT_READ | mmap.PROT_WRITE,
offset=addr & ~MAP_MASK,
) as mem:
start_addr = addr & MAP_MASK
stop_addr = start_addr + 4
mem[start_addr:stop_addr] = value_bytes
contents = mem[start_addr:stop_addr]
finally:
os.close(f)
spi_write(spi, 0x12, 0x00) # Clear calibration bits
spi_write(spi, 0x0E, 0x30) # Keep CALSELI and CALSELQ set, clear CALCLK
print("DAC self-calibration completed")
def manual_override(enable=True): def manual_override(enable=True):
reg_contents = read_from_memory(CTRL_ADDR, 1)[0] reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
@ -138,7 +87,6 @@ def manual_override(enable=True):
to_write = reg_contents | 0b1 if enable else reg_contents & 0b110 to_write = reg_contents | 0b1 if enable else reg_contents & 0b110
write_to_memory(CTRL_ADDR, to_write) write_to_memory(CTRL_ADDR, to_write)
def power_down(channel, power_down=True): def power_down(channel, power_down=True):
assert channel in (0, 1) assert channel in (0, 1)
@ -152,31 +100,49 @@ def power_down(channel, power_down=True):
reg_contents = read_from_memory(CTRL_ADDR, 1)[0] reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
print(f"REG contents: 0b{reg_contents:03b}") print(f"REG contents: 0b{reg_contents:03b}")
def set_dac_output(value):
value = min(value, 0x3FFF)
low_word = value & 0xFF
high_word = (value >> 8) & 0x3F
def write_sample(channel, sample): write_to_memory(CH0_HIGH_WORD_ADDR, high_word)
assert channel in (0, 1) write_to_memory(CH0_LOW_WORD_ADDR, low_word)
if channel == 0: write_to_memory(CH1_HIGH_WORD_ADDR, high_word)
addresses = [CH0_HIGH_WORD_ADDR, CH0_LOW_WORD_ADDR] write_to_memory(CH1_LOW_WORD_ADDR, low_word)
else: print(f"DAC output set to: 0x{value:04X}")
addresses = [CH1_HIGH_WORD_ADDR, CH1_LOW_WORD_ADDR]
low_word_value = sample & 0xFF def configure_ad9117():
high_word_value = (sample >> 8) & 0x3F spi = spidev.SpiDev()
values = [high_word_value, low_word_value] spi.open(MAIN_DAC_BUS, MAIN_DAC_DEVICE)
for addr, value in zip(addresses, values): spi.max_speed_hz = 5000
write_to_memory(addr, value) spi.mode = 0b00 # CPOL = 0 CPHA = 0
spi.cshigh = False
try:
hard_reset(spi)
if not check_version(spi):
print("Unrecognized DAC version")
return False
def write_ramp(): configure_dac(spi)
signal = [i for i in range(16384)] dac_self_calibration(spi)
for value in signal: power_down(0, False)
write_sample(0, value) power_down(1, False)
manual_override(True)
def main(): # Enable DAC outputs
main_dac_init() spi_write(spi, 0x01, spi_read(spi, 0x01) & ~((1 << 4) | (1 << 3)))
power_down(0, False)
power_down(1, False) print("AD9117 configuration completed successfully")
return True
except Exception as e:
print(f"Error configuring AD9117: {e}")
return False
finally:
spi.close()
if __name__ == "__main__": if __name__ == "__main__":
main() configure_ad9117()