forked from M-Labs/nix-servo
pyfastservo: fix dac init script and cleanup
This commit is contained in:
parent
61fa18fb18
commit
8506da0128
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@ -17,8 +17,7 @@
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# You should have received a copy of the GNU General Public License
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <https://www.gnu.org/licenses/>.
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# along with this program. If not, see <https://www.gnu.org/licenses/>.
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import mmap
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import time
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import os
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import spidev
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import spidev
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from pyfastservo.common import (
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from pyfastservo.common import (
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@ -29,108 +28,58 @@ from pyfastservo.common import (
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CTRL_ADDR,
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CTRL_ADDR,
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MAP_MASK,
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MAP_MASK,
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PAGESIZE,
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PAGESIZE,
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write_to_memory,
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read_from_memory
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)
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)
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# /dev/spidev2.0 <=> spidev<BUS>.<DEVICE>
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# /dev/spidev2.0 <=> spidev<BUS>.<DEVICE>
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MAIN_DAC_BUS = 2
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MAIN_DAC_BUS = 2
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MAIN_DAC_DEVICE = 0
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MAIN_DAC_DEVICE = 0
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DAC_VERSION = 0x0A
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DAC_VERSION = 0x0A
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def main_dac_init():
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def spi_write(spi, address, value):
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spi = spidev.SpiDev()
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spi.xfer2([address, value])
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try:
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def spi_read(spi, address):
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spi.open(MAIN_DAC_BUS, MAIN_DAC_DEVICE)
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rx_buffer = spi.xfer2([0x80 | address, 0x00])
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spi.max_speed_hz = 5000
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return rx_buffer[1]
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spi.mode = 0b00 # CPOL = 0 CPHA = 0
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spi.cshigh = False
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spi_buffer = [0x00, 0x10] # software reset
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def hard_reset(spi):
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spi.xfer2(spi_buffer)
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spi_write(spi, 0x00, 0x10) # Software reset
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spi_write(spi, 0x00, 0x00) # Release software reset
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spi_read(spi, 0x00) # Read reset address (necessary for reset to take effect)
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spi_buffer = [0x00, 0x00] # release software reset
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def check_version(spi):
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spi.xfer2(spi_buffer)
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version = spi_read(spi, 0x1F)
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print(f"DAC version: 0x{version:02X}")
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return version == DAC_VERSION
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spi_buffer = [
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def configure_dac(spi):
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0x80,
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power_down_reg = spi_read(spi, 0x01)
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0x00,
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spi_write(spi, 0x01, power_down_reg & ~(1 << 0)) # Clear EXTREF bit for internal reference
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] # for some reason it is needed to read the reset address for reset to actually reset
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spi_write(spi, 0x0D, 0x00) # Set RREF to 10 kΩ for 1.0V reference
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rx_buffer = spi.xfer2(spi_buffer)
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spi_write(spi, 0x04, 0xA0) # Enable on-chip IRSET (1.6 kΩ for 20mA output)
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spi_write(spi, 0x07, 0xA0) # Enable on-chip QRSET (1.6 kΩ for 20mA output)
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spi_write(spi, 0x05, 0x00) # Disable internal IRCML
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spi_write(spi, 0x08, 0x00) # Disable internal QRCML
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spi_write(spi, 0x02, 0xB4) # Enable 2's complement, LVDS interface, 4 LVDS lanes
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spi_buffer = [0x9F, 0x00] # hardware version
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def dac_self_calibration(spi):
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rx_buffer = spi.xfer2(spi_buffer)
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spi_write(spi, 0x12, 0x00) # Reset calibration status
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if rx_buffer[1] != DAC_VERSION:
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spi_write(spi, 0x0E, 0x08) # Enable calibration clock, default divide ratio
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print(f"Unrecognized device: 0x{rx_buffer[1]:02X}")
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spi_write(spi, 0x0E, 0x38) # CALSELI = 1, CALSELQ = 1, CALCLK = 1
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spi_write(spi, 0x12, 0x10) # Set CALEN bit
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print("=== Contents of spi buffer after DAC VERSION read back: ===")
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while True:
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print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
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status = spi_read(spi, 0x0F)
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if status & 0xC0 == 0xC0: # Both CALSTATI and CALSTATQ are 1
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spi_buffer = [0x82, 00]
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break
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rx_buffer = spi.xfer2(spi_buffer)
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time.sleep(0.01)
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print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
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# set to 2's complement and I to be first of pair on data input pads
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spi_buffer = [0x02, 0xB4]
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rx_buffer = spi.xfer2(spi_buffer)
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spi_buffer = [0x82, 00]
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rx_buffer = spi.xfer2(spi_buffer)
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print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
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for i in range(10):
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spi_buffer = [0x94, 0x00]
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rx_buffer = spi.xfer2(spi_buffer)
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print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
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finally:
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spi.close()
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def read_from_memory(address, n_bytes):
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assert n_bytes <= 4
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addr = address
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try:
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f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
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with mmap.mmap(
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f,
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PAGESIZE,
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mmap.MAP_SHARED,
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mmap.PROT_READ | mmap.PROT_WRITE,
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offset=addr & ~MAP_MASK,
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) as mem:
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start_addr = addr & MAP_MASK
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stop_addr = start_addr + 4
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# print(f"addr: 0x{addr:x}\tstart_addr: 0x{start_addr}\tstop_addr: 0x{stop_addr}")
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contents = mem[start_addr:stop_addr]
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read_value = list(contents)[:n_bytes]
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finally:
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os.close(f)
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return read_value
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def write_to_memory(address, value):
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value_bytes = value.to_bytes(4, "little")
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addr = address
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try:
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f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
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with mmap.mmap(
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f,
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PAGESIZE,
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mmap.MAP_SHARED,
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mmap.PROT_READ | mmap.PROT_WRITE,
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offset=addr & ~MAP_MASK,
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) as mem:
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start_addr = addr & MAP_MASK
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stop_addr = start_addr + 4
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mem[start_addr:stop_addr] = value_bytes
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contents = mem[start_addr:stop_addr]
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finally:
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os.close(f)
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spi_write(spi, 0x12, 0x00) # Clear calibration bits
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spi_write(spi, 0x0E, 0x30) # Keep CALSELI and CALSELQ set, clear CALCLK
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print("DAC self-calibration completed")
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def manual_override(enable=True):
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def manual_override(enable=True):
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reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
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reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
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@ -138,7 +87,6 @@ def manual_override(enable=True):
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to_write = reg_contents | 0b1 if enable else reg_contents & 0b110
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to_write = reg_contents | 0b1 if enable else reg_contents & 0b110
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write_to_memory(CTRL_ADDR, to_write)
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write_to_memory(CTRL_ADDR, to_write)
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def power_down(channel, power_down=True):
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def power_down(channel, power_down=True):
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assert channel in (0, 1)
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assert channel in (0, 1)
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@ -152,31 +100,49 @@ def power_down(channel, power_down=True):
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reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
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reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
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print(f"REG contents: 0b{reg_contents:03b}")
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print(f"REG contents: 0b{reg_contents:03b}")
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def set_dac_output(value):
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value = min(value, 0x3FFF)
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low_word = value & 0xFF
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high_word = (value >> 8) & 0x3F
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def write_sample(channel, sample):
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write_to_memory(CH0_HIGH_WORD_ADDR, high_word)
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assert channel in (0, 1)
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write_to_memory(CH0_LOW_WORD_ADDR, low_word)
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if channel == 0:
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write_to_memory(CH1_HIGH_WORD_ADDR, high_word)
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addresses = [CH0_HIGH_WORD_ADDR, CH0_LOW_WORD_ADDR]
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write_to_memory(CH1_LOW_WORD_ADDR, low_word)
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else:
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print(f"DAC output set to: 0x{value:04X}")
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addresses = [CH1_HIGH_WORD_ADDR, CH1_LOW_WORD_ADDR]
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low_word_value = sample & 0xFF
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def configure_ad9117():
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high_word_value = (sample >> 8) & 0x3F
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spi = spidev.SpiDev()
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values = [high_word_value, low_word_value]
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spi.open(MAIN_DAC_BUS, MAIN_DAC_DEVICE)
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for addr, value in zip(addresses, values):
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spi.max_speed_hz = 5000
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write_to_memory(addr, value)
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spi.mode = 0b00 # CPOL = 0 CPHA = 0
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spi.cshigh = False
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try:
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hard_reset(spi)
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if not check_version(spi):
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print("Unrecognized DAC version")
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return False
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def write_ramp():
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configure_dac(spi)
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signal = [i for i in range(16384)]
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dac_self_calibration(spi)
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for value in signal:
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write_sample(0, value)
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def main():
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main_dac_init()
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power_down(0, False)
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power_down(0, False)
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power_down(1, False)
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power_down(1, False)
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manual_override(True)
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# Enable DAC outputs
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spi_write(spi, 0x01, spi_read(spi, 0x01) & ~((1 << 4) | (1 << 3)))
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print("AD9117 configuration completed successfully")
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return True
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except Exception as e:
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print(f"Error configuring AD9117: {e}")
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return False
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finally:
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spi.close()
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if __name__ == "__main__":
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if __name__ == "__main__":
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main()
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configure_ad9117()
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