forked from M-Labs/nix-servo
add fast-servo python init scripts
This commit is contained in:
parent
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# This file is part of Fast Servo Software Package.
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#
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# Copyright (C) 2023 Jakub Matyas
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# Warsaw University of Technology <jakubk.m@gmail.com>
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# SPDX-License-Identifier: GPL-3.0-or-later
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <https://www.gnu.org/licenses/>.
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import mmap
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import os
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import spidev
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from common import (
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ADC_AFE_CTRL_ADDR,
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ADC_BITSLIP_ADDR,
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ADC_CH0_HIGH_ADDR,
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ADC_CH0_LOW_ADDR,
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ADC_CH1_HIGH_ADDR,
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ADC_CH1_LOW_ADDR,
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ADC_DELAY_ADDR,
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ADC_FRAME_ADDR,
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AUX_ADC_ADDR,
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MAP_MASK,
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PAGESIZE,
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)
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# /dev/spidev1.0 <=> spidev<BUS>.<DEVICE>
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MAIN_ADC_BUS = 1
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MAIN_ADC_DEVICE = 1
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AUX_ADC_BUS = 1
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AUX_ADC_PORT_A = 2
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AUX_ADC_PORT_B = 3
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def main_adc_config(test_pattern):
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high_word = (test_pattern & 0xFF00) >> 8
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low_word = test_pattern & 0xFF
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spi = spidev.SpiDev()
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try:
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spi.open(MAIN_ADC_BUS, MAIN_ADC_DEVICE)
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spi.max_speed_hz = 50000
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spi.mode = 0b00 # CPOL = 0 CPHA = 0
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spi.cshigh = True
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# spi.read0 = False
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spi_buffer = [0x00, 0x80] # reset
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rx_buffer = [0x00, 0x00]
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spi.xfer2(spi_buffer)
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# REGISTER A1
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spi_buffer = [0x01, 0x20] # set to Two's complement Data Format
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spi.xfer2(spi_buffer)
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# read values back
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spi_buffer = [0x81, 0x00]
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rx_buffer = spi.xfer2(spi_buffer)
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print(f"Spi readback register 0x01: 0x{rx_buffer[1]:02x}")
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if rx_buffer[1] != 0x20:
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print("Different value read than sent in reg 0x02")
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# REGISTER A2
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spi_buffer = [
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0x02,
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0x15,
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] # set to LVDS output, set 4 data lanes and turn on test mode
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spi.xfer2(spi_buffer)
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# read values back
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spi_buffer = [0x82, 0x00]
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rx_buffer = spi.xfer2(spi_buffer)
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print(f"Spi readback register 0x02: 0x{rx_buffer[1]:02x}")
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if rx_buffer[1] != 0x15:
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print("Different value read than sent in reg 0x02")
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# REGISTER A3
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# test pattern high word
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spi_buffer = [0x03, high_word]
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spi.xfer2(spi_buffer)
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# read balues back
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spi_buffer = [0x83, 0x00]
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rx_buffer = spi.xfer2(spi_buffer)
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print(f"Spi readback register 0x03: 0x{rx_buffer[1]:02x}")
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if rx_buffer[1] != high_word:
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print("Different value read than sent in reg 0x03")
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# REGISTER A4
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# test pattern low word
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spi_buffer = [0x04, low_word]
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spi.xfer2(spi_buffer)
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# read balues back
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spi_buffer = [0x84, 0x00]
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rx_buffer = spi.xfer2(spi_buffer)
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print(f"Spi readback register 0x04: 0x{rx_buffer[1]:02x}")
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if rx_buffer[1] != low_word:
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print("Different value read than sent in reg 0x04")
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finally:
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spi.close()
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def main_adc_test_mode(enable):
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spi = spidev.SpiDev()
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try:
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spi.open(MAIN_ADC_BUS, MAIN_ADC_DEVICE)
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spi.max_speed_hz = 50000
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spi.mode = 0b00 # CPOL = 0 CPHA = 0
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spi.cshigh = True
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# spi.read0 = True
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reg_contents = (
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0x15 if enable else 0x11
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) # set to LVDS output, set 4 data lanes and turn on or off test mode
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spi_buffer = [0x02, reg_contents]
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spi.xfer2(spi_buffer)
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# read values back
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spi_buffer = [0x82, 0x00]
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rx_buffer = spi.xfer2(spi_buffer)
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print(f"Spi readback register 0x02: 0x{rx_buffer[1]:02x}")
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if rx_buffer[1] != reg_contents:
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print("Different value read than sent in reg 0x02")
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finally:
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spi.close()
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def read_from_memory(address, n_bytes):
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assert n_bytes <= 4
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addr = address
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try:
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f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
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with mmap.mmap(
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f,
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PAGESIZE,
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mmap.MAP_SHARED,
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mmap.PROT_READ | mmap.PROT_WRITE,
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offset=addr & ~MAP_MASK,
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) as mem:
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start_addr = addr & MAP_MASK
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stop_addr = start_addr + 4
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# print(f"addr: 0x{addr:x}\tstart_addr: 0x{start_addr}\tstop_addr: 0x{stop_addr}")
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contents = mem[start_addr:stop_addr]
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read_value = list(contents)[:n_bytes]
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# print("Read value: ", read_value)
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finally:
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os.close(f)
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return read_value
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def write_to_memory(address, value):
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value_bytes = value.to_bytes(4, "little")
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addr = address
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try:
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f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
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with mmap.mmap(
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f,
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PAGESIZE,
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mmap.MAP_SHARED,
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mmap.PROT_READ | mmap.PROT_WRITE,
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offset=addr & ~MAP_MASK,
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) as mem:
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start_addr = addr & MAP_MASK
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stop_addr = start_addr + 4
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# print(f"addr: 0x{addr:x}\tstart_addr: 0x{start_addr}\tstop_addr: 0x{stop_addr}")
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mem[start_addr:stop_addr] = value_bytes
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contents = mem[start_addr:stop_addr]
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# print("Read value: ", list(contents), " written value: ", list(value_bytes))
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finally:
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os.close(f)
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def word_align():
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value = 0
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edge_detected = False
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transition = False
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tap_delay = 0
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for i in range(4):
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current_frame = read_from_memory(ADC_FRAME_ADDR, 1)[0]
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if current_frame != 0x0C:
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print(
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f"Performing bitslip (bitslip iteration: {i}). Reason: current_frame is 0x{current_frame:02x} instead of 0x0C"
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)
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write_to_memory(ADC_BITSLIP_ADDR, 1)
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else:
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print(f"No bitslip required; Currernt frame = 0x{current_frame:02x}")
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break
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current_frame = read_from_memory(ADC_FRAME_ADDR, 1)[0]
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prev_frame = current_frame
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for i in range(32):
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write_to_memory(ADC_DELAY_ADDR, tap_delay)
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if edge_detected == 1:
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break
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current_frame = read_from_memory(ADC_FRAME_ADDR, 1)[0]
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print(f"Tap delay: {tap_delay}")
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print(f"Current frame: 0x{current_frame:02x}")
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if current_frame == prev_frame:
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tap_delay += 1
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elif not transition:
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tap_delay += 1
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transition = True
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elif transition:
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tap_delay = i // 2
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edge_detected = True
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prev_frame = current_frame
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if not edge_detected:
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tap_delay = 11 # empirically tested to work best
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write_to_memory(ADC_DELAY_ADDR, tap_delay)
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print(f"No edge detected; setting iDelay to: {tap_delay}")
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if edge_detected:
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write_to_memory(ADC_DELAY_ADDR, tap_delay + 2)
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print(f"Edge detected; setting iDelay to (tap_delay + 2): {tap_delay} + 2")
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adc_ch0 = read_from_memory(ADC_CH0_HIGH_ADDR, 4)
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print(f"ADC_CH0: 0x{adc_ch0}")
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adc_ch0 = (read_from_memory(ADC_CH0_HIGH_ADDR, 1)[0] << 8) | read_from_memory(
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ADC_CH0_LOW_ADDR, 1
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)[0]
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adc_ch1 = (read_from_memory(ADC_CH1_HIGH_ADDR, 1)[0] << 8) | read_from_memory(
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ADC_CH1_LOW_ADDR, 1
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)[0]
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print(f"Final ADC_CH0: 0x{adc_ch0:04x}")
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print(f"Final ADC_CH1: 0x{adc_ch1:04x}")
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def modify_bit(original_value, position, bit_value):
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mask = 1 << position
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return (original_value & ~mask) | (bit_value << position)
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def adc_aux_config():
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# MSB to LSB
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# | RANGE | ADDR [2:0] | DIFF |
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# DIFF = 0 => configure as single ended (it is negated in gateware)
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# RANGE = 0 => configure as 0-2.5 Vref
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to_write = 0b00000
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write_to_memory(AUX_ADC_ADDR, to_write)
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def adc_aux_read(port, type, pin):
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# port:
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# 1 - port A
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# 2 - port B
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# type:
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# 0 - single-ended
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# 1 - differential
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# pin:
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# 0b000 - VA1/VB1
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# 0b001 - VA2/VB2
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# 0b010 - VA3/VB3
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# 0b011 - VA4/VB4
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assert type in (0, 1)
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assert port in (1, 2)
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write_buffer = [0, 0]
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read_buffer = [0, 0]
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aux_config_reg = read_from_memory(AUX_ADC_ADDR, 1)[0]
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aux_config = (aux_config_reg & 0b10001) | pin << 1
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write_to_memory(AUX_ADC_ADDR, aux_config)
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spi = spidev.SpiDev()
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try:
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spi.open(1, 3) # AUX ADC 1?
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spi.max_speed_hz = 5000
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spi.mode = 0b00
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spi.cshigh = True
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read_buffer = spi.xfer2(write_buffer)
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mu_voltage = read_buffer[0] << 8 | read_buffer[1] >> 2
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print(f"MU_voltage: 0x{mu_voltage:04X}")
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print(f"Read_buffer[0]: 0x{read_buffer[0]:02X}")
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print(f"Read_buffer[1]: 0x{read_buffer[1]:02X}")
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return mu_voltage * 2.5 / 4096
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finally:
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spi.close()
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def main():
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main_adc_config(0x811F)
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word_align()
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main_adc_test_mode(False)
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write_to_memory(ADC_AFE_CTRL_ADDR, 0b1100) # {-, -, ch2_X10, ch1_X10}
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print(read_from_memory(ADC_AFE_CTRL_ADDR, 1)[0])
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if __name__ == "__main__":
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main()
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@ -0,0 +1,74 @@
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# This file is part of Fast Servo Software Package.
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#
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# Copyright (C) 2023 Jakub Matyas
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# Warsaw University of Technology <jakubk.m@gmail.com>
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# SPDX-License-Identifier: GPL-3.0-or-later
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <https://www.gnu.org/licenses/>.
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CSR_SIZE = 0x800
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MAP_SIZE = 0x1000
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MAP_MASK = 0xFFF
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PAGESIZE = 0x1000
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LINIEN_OFFSET = 0x0
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# LINIEN_OFFSET = 0x300000
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# ----------------------------------------------------------------
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# FRONT PANEL LEDS REGISTER ADDRESSES
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LED0_BASE_ADDR = 0x40005000 + LINIEN_OFFSET
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LED1_BASE_ADDR = 0x40005800 + LINIEN_OFFSET
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LED2_BASE_ADDR = 0x40006000 + LINIEN_OFFSET
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LED3_BASE_ADDR = 0x40006800 + LINIEN_OFFSET
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# ----------------------------------------------------------------
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# DAC REGISTER ADDRESSES
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ADC_BASE_ADDR = 0x40004800 + LINIEN_OFFSET
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ADC_FRAME_OFFSET = 0x0
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ADC_CH0_HIGH_OFFSET = 0x4
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ADC_CH0_LOW_OFFSET = 0x8
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ADC_CH1_HIGH_OFFSET = 0xC
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ADC_CH1_LOW_OFFSET = 0x10
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ADC_TAP_DELAY_OFFSET = 0x14
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ADC_BITSLIP_OFFSET = 0x18
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ADC_AFE_CTRL_OFFSET = 0x1C
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ADC_FRAME_ADDR = ADC_BASE_ADDR + ADC_FRAME_OFFSET
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ADC_CH0_HIGH_ADDR = ADC_BASE_ADDR + ADC_CH0_HIGH_OFFSET
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ADC_CH0_LOW_ADDR = ADC_BASE_ADDR + ADC_CH0_LOW_OFFSET
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ADC_CH1_HIGH_ADDR = ADC_BASE_ADDR + ADC_CH1_HIGH_OFFSET
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ADC_CH1_LOW_ADDR = ADC_BASE_ADDR + ADC_CH1_LOW_OFFSET
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||||||
|
ADC_DELAY_ADDR = ADC_BASE_ADDR + ADC_TAP_DELAY_OFFSET
|
||||||
|
ADC_BITSLIP_ADDR = ADC_BASE_ADDR + ADC_BITSLIP_OFFSET
|
||||||
|
ADC_AFE_CTRL_ADDR = ADC_BASE_ADDR + ADC_AFE_CTRL_OFFSET
|
||||||
|
|
||||||
|
AUX_ADC_ADDR = 0x40007800 + LINIEN_OFFSET
|
||||||
|
|
||||||
|
|
||||||
|
# ----------------------------------------------------------------
|
||||||
|
# DAC REGISTER ADDRESSES
|
||||||
|
DAC_BASE_ADDR = 0x40007000 + LINIEN_OFFSET
|
||||||
|
CTRL_OFFSET = 0x0
|
||||||
|
CH0_HIGH_WORD_OFFSET = 0x4
|
||||||
|
CH0_LOW_WORD_OFFSET = 0x8
|
||||||
|
CH1_HIGH_WORD_OFFSET = 0xC
|
||||||
|
CH1_LOW_WORD_OFFSET = 0x10
|
||||||
|
|
||||||
|
CTRL_ADDR = DAC_BASE_ADDR + CTRL_OFFSET
|
||||||
|
CH0_HIGH_WORD_ADDR = DAC_BASE_ADDR + CH0_HIGH_WORD_OFFSET
|
||||||
|
CH0_LOW_WORD_ADDR = DAC_BASE_ADDR + CH0_LOW_WORD_OFFSET
|
||||||
|
CH1_HIGH_WORD_ADDR = DAC_BASE_ADDR + CH1_HIGH_WORD_OFFSET
|
||||||
|
CH1_LOW_WORD_ADDR = DAC_BASE_ADDR + CH1_LOW_WORD_OFFSET
|
||||||
|
|
@ -0,0 +1,182 @@
|
||||||
|
# This file is part of Fast Servo Software Package.
|
||||||
|
#
|
||||||
|
# Copyright (C) 2023 Jakub Matyas
|
||||||
|
# Warsaw University of Technology <jakubk.m@gmail.com>
|
||||||
|
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||||
|
#
|
||||||
|
# This program is free software: you can redistribute it and/or modify
|
||||||
|
# it under the terms of the GNU General Public License as published by
|
||||||
|
# the Free Software Foundation, either version 3 of the License, or
|
||||||
|
# (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
|
import mmap
|
||||||
|
import os
|
||||||
|
|
||||||
|
import spidev
|
||||||
|
from common import (
|
||||||
|
CH0_HIGH_WORD_ADDR,
|
||||||
|
CH0_LOW_WORD_ADDR,
|
||||||
|
CH1_HIGH_WORD_ADDR,
|
||||||
|
CH1_LOW_WORD_ADDR,
|
||||||
|
CTRL_ADDR,
|
||||||
|
MAP_MASK,
|
||||||
|
PAGESIZE,
|
||||||
|
)
|
||||||
|
|
||||||
|
# /dev/spidev2.0 <=> spidev<BUS>.<DEVICE>
|
||||||
|
MAIN_DAC_BUS = 2
|
||||||
|
MAIN_DAC_DEVICE = 0
|
||||||
|
|
||||||
|
DAC_VERSION = 0x0A
|
||||||
|
|
||||||
|
|
||||||
|
def main_dac_init():
|
||||||
|
spi = spidev.SpiDev()
|
||||||
|
|
||||||
|
try:
|
||||||
|
spi.open(MAIN_DAC_BUS, MAIN_DAC_DEVICE)
|
||||||
|
spi.max_speed_hz = 5000
|
||||||
|
spi.mode = 0b00 # CPOL = 0 CPHA = 0
|
||||||
|
spi.cshigh = True
|
||||||
|
|
||||||
|
spi_buffer = [0x00, 0x10] # software reset
|
||||||
|
spi.xfer2(spi_buffer)
|
||||||
|
|
||||||
|
spi_buffer = [0x00, 0x00] # release software reset
|
||||||
|
spi.xfer2(spi_buffer)
|
||||||
|
|
||||||
|
spi_buffer = [
|
||||||
|
0x80,
|
||||||
|
0x00,
|
||||||
|
] # for some reason it is needed to read the reset address for reset to actually reset
|
||||||
|
rx_buffer = spi.xfer2(spi_buffer)
|
||||||
|
|
||||||
|
spi_buffer = [0x9F, 0x00] # hardware version
|
||||||
|
rx_buffer = spi.xfer2(spi_buffer)
|
||||||
|
if rx_buffer[1] != DAC_VERSION:
|
||||||
|
print(f"Unrecognized device: 0x{rx_buffer[1]:02X}")
|
||||||
|
|
||||||
|
print("=== Contents of spi buffer after DAC VERSION read back: ===")
|
||||||
|
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
|
||||||
|
|
||||||
|
spi_buffer = [0x82, 00]
|
||||||
|
rx_buffer = spi.xfer2(spi_buffer)
|
||||||
|
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
|
||||||
|
|
||||||
|
# set to 2's complement and I to be first of pair on data input pads
|
||||||
|
spi_buffer = [0x02, 0xB4]
|
||||||
|
rx_buffer = spi.xfer2(spi_buffer)
|
||||||
|
spi_buffer = [0x82, 00]
|
||||||
|
rx_buffer = spi.xfer2(spi_buffer)
|
||||||
|
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
|
||||||
|
|
||||||
|
for i in range(10):
|
||||||
|
spi_buffer = [0x94, 0x00]
|
||||||
|
rx_buffer = spi.xfer2(spi_buffer)
|
||||||
|
print(f"0x{rx_buffer[0]:02X}{rx_buffer[1]:02X}")
|
||||||
|
|
||||||
|
finally:
|
||||||
|
spi.close()
|
||||||
|
|
||||||
|
|
||||||
|
def read_from_memory(address, n_bytes):
|
||||||
|
assert n_bytes <= 4
|
||||||
|
addr = address
|
||||||
|
|
||||||
|
try:
|
||||||
|
f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
|
||||||
|
with mmap.mmap(
|
||||||
|
f,
|
||||||
|
PAGESIZE,
|
||||||
|
mmap.MAP_SHARED,
|
||||||
|
mmap.PROT_READ | mmap.PROT_WRITE,
|
||||||
|
offset=addr & ~MAP_MASK,
|
||||||
|
) as mem:
|
||||||
|
start_addr = addr & MAP_MASK
|
||||||
|
stop_addr = start_addr + 4
|
||||||
|
# print(f"addr: 0x{addr:x}\tstart_addr: 0x{start_addr}\tstop_addr: 0x{stop_addr}")
|
||||||
|
contents = mem[start_addr:stop_addr]
|
||||||
|
read_value = list(contents)[:n_bytes]
|
||||||
|
finally:
|
||||||
|
os.close(f)
|
||||||
|
|
||||||
|
return read_value
|
||||||
|
|
||||||
|
|
||||||
|
def write_to_memory(address, value):
|
||||||
|
value_bytes = value.to_bytes(4, "little")
|
||||||
|
addr = address
|
||||||
|
|
||||||
|
try:
|
||||||
|
f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
|
||||||
|
with mmap.mmap(
|
||||||
|
f,
|
||||||
|
PAGESIZE,
|
||||||
|
mmap.MAP_SHARED,
|
||||||
|
mmap.PROT_READ | mmap.PROT_WRITE,
|
||||||
|
offset=addr & ~MAP_MASK,
|
||||||
|
) as mem:
|
||||||
|
start_addr = addr & MAP_MASK
|
||||||
|
stop_addr = start_addr + 4
|
||||||
|
mem[start_addr:stop_addr] = value_bytes
|
||||||
|
contents = mem[start_addr:stop_addr]
|
||||||
|
finally:
|
||||||
|
os.close(f)
|
||||||
|
|
||||||
|
|
||||||
|
def manual_override(enable=True):
|
||||||
|
reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
|
||||||
|
print(f"REG contents: 0b{reg_contents:03b}")
|
||||||
|
to_write = reg_contents | 0b1 if enable else reg_contents & 0b110
|
||||||
|
write_to_memory(CTRL_ADDR, to_write)
|
||||||
|
|
||||||
|
|
||||||
|
def power_down(channel, power_down=True):
|
||||||
|
assert channel in (0, 1)
|
||||||
|
|
||||||
|
bitmask = 1 << (channel + 1) & 0b111
|
||||||
|
reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
|
||||||
|
value = (1 if power_down else 0) << (channel + 1)
|
||||||
|
reg_contents &= ~bitmask
|
||||||
|
|
||||||
|
to_write = reg_contents | value
|
||||||
|
write_to_memory(CTRL_ADDR, to_write)
|
||||||
|
reg_contents = read_from_memory(CTRL_ADDR, 1)[0]
|
||||||
|
print(f"REG contents: 0b{reg_contents:03b}")
|
||||||
|
|
||||||
|
|
||||||
|
def write_sample(channel, sample):
|
||||||
|
assert channel in (0, 1)
|
||||||
|
if channel == 0:
|
||||||
|
addresses = [CH0_HIGH_WORD_ADDR, CH0_LOW_WORD_ADDR]
|
||||||
|
else:
|
||||||
|
addresses = [CH1_HIGH_WORD_ADDR, CH1_LOW_WORD_ADDR]
|
||||||
|
|
||||||
|
low_word_value = sample & 0xFF
|
||||||
|
high_word_value = (sample >> 8) & 0x3F
|
||||||
|
values = [high_word_value, low_word_value]
|
||||||
|
for addr, value in zip(addresses, values):
|
||||||
|
write_to_memory(addr, value)
|
||||||
|
|
||||||
|
|
||||||
|
def write_ramp():
|
||||||
|
signal = [i for i in range(16384)]
|
||||||
|
|
||||||
|
for value in signal:
|
||||||
|
write_sample(0, value)
|
||||||
|
|
||||||
|
def main():
|
||||||
|
main_dac_init()
|
||||||
|
power_down(0, False)
|
||||||
|
power_down(1, False)
|
||||||
|
|
||||||
|
if __name__ == "__main__":
|
||||||
|
main()
|
||||||
|
|
@ -0,0 +1,66 @@
|
||||||
|
# This file is part of Fast Servo Software Package.
|
||||||
|
#
|
||||||
|
# Copyright (C) 2023 Jakub Matyas
|
||||||
|
# Warsaw University of Technology <jakubk.m@gmail.com>
|
||||||
|
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||||
|
#
|
||||||
|
# This program is free software: you can redistribute it and/or modify
|
||||||
|
# it under the terms of the GNU General Public License as published by
|
||||||
|
# the Free Software Foundation, either version 3 of the License, or
|
||||||
|
# (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
|
import mmap
|
||||||
|
import os
|
||||||
|
import time
|
||||||
|
|
||||||
|
from common import (
|
||||||
|
LED0_BASE_ADDR,
|
||||||
|
LED1_BASE_ADDR,
|
||||||
|
LED2_BASE_ADDR,
|
||||||
|
LED3_BASE_ADDR,
|
||||||
|
MAP_MASK,
|
||||||
|
PAGESIZE,
|
||||||
|
)
|
||||||
|
|
||||||
|
ON = 1
|
||||||
|
OFF = 0
|
||||||
|
|
||||||
|
|
||||||
|
def main():
|
||||||
|
addrs = [LED0_BASE_ADDR, LED1_BASE_ADDR, LED2_BASE_ADDR, LED3_BASE_ADDR]
|
||||||
|
|
||||||
|
f = os.open("/dev/mem", os.O_SYNC | os.O_RDWR)
|
||||||
|
for addr in addrs:
|
||||||
|
with mmap.mmap(
|
||||||
|
f,
|
||||||
|
PAGESIZE,
|
||||||
|
mmap.MAP_SHARED,
|
||||||
|
mmap.PROT_READ | mmap.PROT_WRITE,
|
||||||
|
offset=addr & ~MAP_MASK,
|
||||||
|
) as mem:
|
||||||
|
for i in range(6):
|
||||||
|
start_addr = addr & MAP_MASK
|
||||||
|
stop_addr = start_addr + 4
|
||||||
|
print(
|
||||||
|
f"addr: 0x{addr:x}\tstart_addr: 0x{start_addr}\tstop_addr: 0x{stop_addr}"
|
||||||
|
)
|
||||||
|
mem[start_addr:stop_addr] = ON.to_bytes(4, "little")
|
||||||
|
contents = mem[start_addr:stop_addr]
|
||||||
|
time.sleep(0.5)
|
||||||
|
mem[start_addr:stop_addr] = OFF.to_bytes(4, "little")
|
||||||
|
contents = mem[start_addr:stop_addr]
|
||||||
|
time.sleep(0.5)
|
||||||
|
|
||||||
|
os.close(f)
|
||||||
|
|
||||||
|
|
||||||
|
if __name__ == "__main__":
|
||||||
|
main()
|
||||||
|
|
@ -0,0 +1,30 @@
|
||||||
|
# This file is part of Fast Servo Software Package.
|
||||||
|
#
|
||||||
|
# Copyright (C) 2023 Jakub Matyas
|
||||||
|
# Warsaw University of Technology <jakubk.m@gmail.com>
|
||||||
|
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||||
|
#
|
||||||
|
# This program is free software: you can redistribute it and/or modify
|
||||||
|
# it under the terms of the GNU General Public License as published by
|
||||||
|
# the Free Software Foundation, either version 3 of the License, or
|
||||||
|
# (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
|
import adc
|
||||||
|
import si5340
|
||||||
|
import dac
|
||||||
|
|
||||||
|
def main():
|
||||||
|
si5340.configure_si5340()
|
||||||
|
adc.main()
|
||||||
|
dac.main()
|
||||||
|
|
||||||
|
if __name__ == "__main__":
|
||||||
|
main()
|
||||||
|
|
@ -0,0 +1,118 @@
|
||||||
|
# This file is part of Fast Servo Software Package.
|
||||||
|
#
|
||||||
|
# Copyright (C) 2023 Jakub Matyas
|
||||||
|
# Warsaw University of Technology <jakubk.m@gmail.com>
|
||||||
|
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||||
|
#
|
||||||
|
# This program is free software: you can redistribute it and/or modify
|
||||||
|
# it under the terms of the GNU General Public License as published by
|
||||||
|
# the Free Software Foundation, either version 3 of the License, or
|
||||||
|
# (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
|
from smbus2 import SMBus
|
||||||
|
|
||||||
|
BUS_NO = 0
|
||||||
|
IC_ADDR = 0x74
|
||||||
|
|
||||||
|
PAGE_ADDR = 0x1
|
||||||
|
|
||||||
|
OUT0_MUX_SEL_ADDR = 0x15
|
||||||
|
OUT1_MUX_SEL_ADDR = 0x1A
|
||||||
|
OUT2_MUX_SEL_ADDR = 0x29
|
||||||
|
OUT3_MUX_SEL_ADDR = 0x2E
|
||||||
|
|
||||||
|
OUT2_AMPL_ADDR = 0x28
|
||||||
|
|
||||||
|
OUT3_PDN_ADDR = 0x2B
|
||||||
|
OUT3_FORMAT_ADDR = 0x2C
|
||||||
|
OUT3_AMPL_ADDR = 0x2D
|
||||||
|
|
||||||
|
|
||||||
|
N1_DIVIDER_UPDATE_ADDR = 0x17
|
||||||
|
|
||||||
|
data_to_write = 0
|
||||||
|
clk_out_addr = [
|
||||||
|
OUT0_MUX_SEL_ADDR,
|
||||||
|
OUT1_MUX_SEL_ADDR,
|
||||||
|
OUT2_MUX_SEL_ADDR,
|
||||||
|
OUT3_MUX_SEL_ADDR,
|
||||||
|
]
|
||||||
|
|
||||||
|
def configure_si5340():
|
||||||
|
with SMBus(BUS_NO) as bus:
|
||||||
|
|
||||||
|
bus.write_byte_data(IC_ADDR, PAGE_ADDR, 0x0) # setting page to page 0
|
||||||
|
|
||||||
|
# read device id
|
||||||
|
low_word = bus.read_byte_data(IC_ADDR, 0x2)
|
||||||
|
high_word = bus.read_byte_data(IC_ADDR, 0x3)
|
||||||
|
|
||||||
|
print(f"DEV ID: 0x{high_word:2x}{low_word:2x}")
|
||||||
|
|
||||||
|
data_to_write = 0x1
|
||||||
|
bus.write_byte_data(
|
||||||
|
IC_ADDR, PAGE_ADDR, data_to_write
|
||||||
|
) # change to page 1 for output settings
|
||||||
|
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, PAGE_ADDR)
|
||||||
|
if data_to_write != readback:
|
||||||
|
raise ValueError(f"Failed to set page.")
|
||||||
|
|
||||||
|
for addr in clk_out_addr:
|
||||||
|
bus.write_byte_data(IC_ADDR, addr, 1) # set source to N1
|
||||||
|
|
||||||
|
bus.write_byte_data(IC_ADDR, OUT2_AMPL_ADDR, 13)
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, OUT2_AMPL_ADDR)
|
||||||
|
# if data_to_write != readback:
|
||||||
|
# raise ValueError(f"Problematic read: {readback}.")
|
||||||
|
|
||||||
|
bus.write_byte_data(IC_ADDR, OUT2_AMPL_ADDR, 0x6B) # setting OUT2 to LVDS25
|
||||||
|
|
||||||
|
bus.write_byte_data(IC_ADDR, OUT3_FORMAT_ADDR, 0xCC) # SETTING out3 to LVCMOS 18
|
||||||
|
# bus.write_byte_data(IC_ADDR, 0x2E, 0x09) # SETTING out3 to LVCMOS 33
|
||||||
|
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, OUT3_PDN_ADDR)
|
||||||
|
print(f"Si5340 OUTx_PDN CLK3: 0x{readback}")
|
||||||
|
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, OUT3_FORMAT_ADDR)
|
||||||
|
print(f"Si5340 OUTx_FORMAT CLK3: 0x{readback}")
|
||||||
|
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, OUT3_AMPL_ADDR)
|
||||||
|
print(f"Si5340 OUTx_AMPL CLK3: 0x{readback}")
|
||||||
|
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, OUT3_MUX_SEL_ADDR)
|
||||||
|
print(f"Si5340 OUTx_CM CLK3: 0x{readback}")
|
||||||
|
|
||||||
|
bus.write_byte_data(
|
||||||
|
IC_ADDR, PAGE_ADDR, 0x3
|
||||||
|
) # setting page to 3 to change dividers values
|
||||||
|
|
||||||
|
n1_numerator = [0x0, 0x0, 0x0, 0x60, 0x22, 0x0]
|
||||||
|
n1_numerator_10M = [0x0, 0x0, 0x0, 0xC0, 0x57, 0x1]
|
||||||
|
n1_num_addr = [0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12]
|
||||||
|
n1_denom_addr = [0x13, 0x14, 0x15, 0x16]
|
||||||
|
for addr, value in zip(n1_num_addr, n1_numerator):
|
||||||
|
bus.write_byte_data(IC_ADDR, addr, value)
|
||||||
|
|
||||||
|
bus.write_byte_data(IC_ADDR, N1_DIVIDER_UPDATE_ADDR, 1)
|
||||||
|
|
||||||
|
for addr in n1_num_addr:
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, addr)
|
||||||
|
print(f"Numerator buffer: 0x{readback:02x}")
|
||||||
|
|
||||||
|
for addr in n1_denom_addr:
|
||||||
|
readback = bus.read_byte_data(IC_ADDR, addr)
|
||||||
|
print(f"Denominator buffer: 0x{readback:02x}")
|
||||||
|
|
||||||
|
bus.write_byte_data(IC_ADDR, PAGE_ADDR, 0x0) # setting page to page 0
|
||||||
|
|
||||||
|
if __name__ == "__main__":
|
||||||
|
configure_si5340()
|
||||||
Loading…
Reference in New Issue