fsagbuya
/
artiq-zynq
forked from M-Labs/artiq-zynq
1
0
Fork 0
Code Pull Requests Activity
687 Commits 4 Branches 0 Tags 1.8 MiB
Commit Graph

452 Commits

Author SHA1 Message Date
mwojcik b9a0bcabeb ksupport: fix build on acpki variants 2023-10-09 17:10:45 +08:00
mwojcik 8eb359ee42 cargo fmt 2023-10-09 11:50:47 +08:00
mwojcik 7263862fd8 satellite: support optional args 2023-10-09 11:42:51 +08:00
mwojcik 29cc0a6e28 ddma/subkernel: fix wrong destination reported 2023-10-09 11:42:51 +08:00
mwojcik 616c40429e satellite: process kernel requests more often 2023-10-09 11:42:51 +08:00
mwojcik 3ea8147966 subkernel: send async statuses when requested 2023-10-09 11:42:51 +08:00
mwojcik cb79c12284 satellite: support subkernels 2023-10-09 11:42:51 +08:00
mwojcik 623cc7b79e libkernel -> ksupport 2023-10-09 11:42:51 +08:00
mwojcik 49205eea17 satellite gateware: add kernel rtio to cri 2023-10-09 11:36:23 +08:00
mwojcik 6885c618b5 move kernel-related code to separate library 2023-10-09 11:36:23 +08:00
mwojcik c696fd826f master: support optional args 2023-10-09 10:35:47 +08:00
mwojcik 4b3c9a3d08 rtio_mgt: remove support for async messages 2023-10-09 10:35:47 +08:00
mwojcik 779aea7c6a check subkernel exceptions only when awaited 2023-10-09 10:35:03 +08:00
mwojcik 6785ca2c85 subkernel: port master support 2023-10-09 10:35:03 +08:00
sven-oxionics 656cbf4546 kasli_soc: use sed_lanes value from HW description 
https://github.com/m-labs/artiq/pull/1745 added a field for setting the number of SED lanes to the HW description. This commit makes it so that the setting is used for Kasli Soc as well.
 2023-10-06 15:37:56 +01:00
mwojcik ecd4ca333c rtio_clocking: inform the user if PLL is bypassed 2023-10-06 16:27:25 +08:00
mwojcik ae3099dd8e kasli_soc: support 100MHz clock 2023-10-06 16:27:25 +08:00
mwojcik 49810da188 runtime: wait longer for PLL lock 2023-10-05 12:17:43 +08:00
mwojcik e451598a06 satman: fix dma reporting wrong destination 2023-09-22 10:29:48 +08:00
mwojcik f4ceca464f drtio: change async messages to sync 2023-09-21 14:18:25 +08:00
morgan f3dcd53086 firmware: fix zc706 compilation warnings 
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
 2023-09-11 15:21:56 +08:00
morgan b3856e879b refactor `write_rustc_cfg_file()` 2023-09-11 11:48:19 +08:00
morgan 1ccae0d442 consolidate all `write..file()` into `config.py` 2023-09-11 11:48:19 +08:00
morgan 2c19f4ac31 replace rustc_cfg[ ] & change write_rustc_cfg_file 2023-09-11 11:48:19 +08:00
Sebastien Bourdeauducq 85ecff2cc1 cargo: update zynq-rs 2023-09-07 19:01:36 +08:00
Sebastien Bourdeauducq 3a305c8cac Revert "cargo: update dependencies" 
This reverts commit 38b0799bb0.
 2023-09-07 19:00:16 +08:00
Sebastien Bourdeauducq 38b0799bb0 cargo: update dependencies 2023-09-07 18:54:30 +08:00
morgan 615f2e3d37 remove misleading 'Actively' from docs at main.rs 2023-09-06 10:53:26 +08:00
Sebastien Bourdeauducq 37df7fd45b cargo fmt 2023-08-30 16:14:35 +08:00
morgan 2ac7eedec1 firmware: fix compilation without virtual LEDs 
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
 2023-08-30 15:33:44 +08:00
MorganTL c61017fbe6 fix compiling error when cfg has has_rtio_moninj 2023-08-30 15:32:09 +08:00
MorganTL 0e6309b95e change write_rustc_cfg_file to follow artiq repo 2023-08-30 14:56:12 +08:00
morgan 1516327c26 firmware: fix zc706 compilation error 
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
 2023-08-29 11:25:28 +08:00
morgan 622d267d55 add virtual LEDs, improve IO expander setup, drive TX_DISABLE 
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
 2023-08-28 16:08:10 +08:00
linuswck 4ae8557018 drtio: remame drtio_transceiver to gt_drtio 
Co-authored-by: linuswck <linuswck@m-labs.hk>
Co-committed-by: linuswck <linuswck@m-labs.hk>
 2023-08-28 13:05:40 +08:00
Sebastien Bourdeauducq dc08c382a2 satman: wait longer for PLL lock (#246) 2023-08-13 13:52:12 +08:00
Sebastien Bourdeauducq ca17cd419e Revert "kasli_soc: add SFP0..3 LED indication" 
This reverts commit 5111778363.
 2023-08-03 10:42:09 +08:00
morgan 5111778363 kasli_soc: add SFP0..3 LED indication 
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
 2023-07-24 16:30:14 +08:00
Sebastien Bourdeauducq ee438105b2 json: base -> drtio_role 2023-06-16 17:03:25 +08:00
Sebastien Bourdeauducq f1ee3a7584 rustfmt 2023-05-30 12:22:46 +08:00
Denis Ovchinnikov 63594d7e3d update configuration of IBUFDS_GTE2 
Input clock is terminated internally with 50 Ohm on each leg and to 4/5 MGTAVCC.
 2023-05-30 12:08:41 +08:00
mwojcik 5e6dca61a9 analyzer: fix overflow behavior 2023-05-29 13:53:28 +08:00
mwojcik b6247f409d analyzer: fix warnings on standalone 2023-05-29 10:03:44 +08:00
mwojcik 6088e6bb6f fix cargo fmt 2023-05-24 10:00:48 +08:00
mwojcik ad076dd4e9 zc706: fix satellite analyzer target 2023-05-24 09:52:16 +08:00
mwojcik a27b450def runtime: port drtio-enabled analyzer 2023-05-22 15:23:40 +08:00
mwojcik c536a70890 satellite gateware: add rtio analyzer 2023-05-22 15:23:24 +08:00
mwojcik 259b0ba1b7 satellite: port analyzer, drtio packets 2023-05-22 15:23:23 +08:00
mwojcik cbc660e740 ddma: pass "uses_ddma" flag 2023-04-18 12:36:07 +08:00
Jonathan Coates 8cb6cf6094 Fix mismatched signatures for the wide interface 
Lists are passed by-reference from python code, and so should be
&CSlice<_> not CSlice<_>.
 2023-04-17 09:24:30 +08:00