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runtime/main: removed bitstream loading code

This commit is contained in:
pca006132 2020-09-01 15:43:54 +08:00
parent eb78e4e2da
commit 050b2457a4
1 changed files with 3 additions and 20 deletions
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23
src/runtime/src/main.rs
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@ -14,14 +14,14 @@ extern crate alloc;
use core::{cmp, str}; use core::{cmp, str};
use log::{info, warn, error}; use log::{info, warn, error};
use libboard_zynq::{timer::GlobalTimer, devc, slcr, mpcore, gic}; use libboard_zynq::{timer::GlobalTimer, mpcore, gic, slcr};
use libasync::{task, block_async}; use libasync::{task, block_async};
use libsupport_zynq::ram; use libsupport_zynq::ram;
use libregister::RegisterW;
use nb; use nb;
use void::Void; use void::Void;
use embedded_hal::blocking::delay::DelayMs; use embedded_hal::blocking::delay::DelayMs;
use libconfig::{Config, load_pl}; use libconfig::Config;
use libregister::RegisterW;
mod proto_core_io; mod proto_core_io;
mod proto_async; mod proto_async;
@ -65,22 +65,6 @@ fn init_gateware() {
slcr::FpgaRstCtrl::zeroed() slcr::FpgaRstCtrl::zeroed()
); );
}); });
if devc::DevC::new().is_done() {
info!("gateware already loaded");
// Do not load again: assume that the gateware already present is
// what we want (e.g. gateware configured via JTAG before PS
// startup, or by FSBL).
// Make sure that the PL/PS interface is enabled (e.g. OpenOCD does not enable it).
slcr::RegisterBlock::unlocked(|slcr| {
slcr.init_postload_fpga();
});
} else {
// Load from SD card
match load_pl::load_bitstream_from_sd() {
Ok(_) => info!("Bitstream loaded successfully!"),
Err(e) => info!("Failure loading bitstream: {}", e),
}
}
} }
fn identifier_read(buf: &mut [u8]) -> &str { fn identifier_read(buf: &mut [u8]) -> &str {
@ -193,7 +177,6 @@ pub fn main_core0() {
init_gateware(); init_gateware();
info!("detected gateware: {}", identifier_read(&mut [0; 64])); info!("detected gateware: {}", identifier_read(&mut [0; 64]));
let cfg = match Config::new() { let cfg = match Config::new() {
Ok(cfg) => cfg, Ok(cfg) => cfg,
Err(err) => { Err(err) => {