Bare-metal Rust on Zynq-7000
Updated 2025-07-28 13:32:41 +08:00
Updated 2025-07-25 06:51:44 +08:00
Bare-metal Rust on Zynq-7000
Updated 2025-07-23 08:07:33 +08:00
New ARTIQ compiler, third iteration
Updated 2025-06-24 13:41:26 +08:00
This is a castellated board designed for fast-servo prototype rev1.0 to replace the malfunctioning Dac analog front end circuitry.
Updated 2025-06-06 12:57:03 +08:00
Updated 2025-06-03 11:52:13 +08:00
Updated 2025-05-30 12:39:48 +08:00
New ARTIQ compiler, third iteration
Updated 2025-05-29 16:47:50 +08:00
ARTIQ Zynq-based core device support
Updated 2025-05-29 15:56:00 +08:00
A leading-edge control system for quantum information experiments
Updated 2025-05-29 15:48:27 +08:00
Shims to prevent front panel from shorting to output GND on DIO_SMA and IDC_SMA
Updated 2025-05-26 16:00:03 +08:00
CPLD/FPGA gateware on Urukul. Forked from https://github.com/quartiq/urukul
Updated 2025-05-15 22:39:44 +08:00
New ARTIQ compiler, third iteration
Updated 2025-05-12 15:07:30 +08:00
DIO_SMA PCB Assembly Fixture for Through Hole and Edge Mount Components
Updated 2025-05-09 16:47:23 +08:00
Power Supply Board for Shuttler Analog Front End Board
Updated 2025-04-28 18:48:29 +08:00
New ARTIQ compiler, third iteration
Updated 2025-04-18 19:19:15 +08:00
rust-fatfs fork with rs-core_io as dependency instead. No support for chrono.
Updated 2025-04-10 13:39:32 +08:00
rust-fatfs fork with rs-core_io as dependency instead. No support for chrono.
Updated 2025-04-10 13:29:39 +08:00
Bare-metal Rust on Zynq-7000
Updated 2025-03-28 15:06:59 +08:00
Updated 2025-03-28 11:41:58 +08:00