Next-generation FPGA SoC toolkit

Updated 2020-04-30 16:47:30 +08:00

M-Labs website (legacy) - see web2019 repository instead

Updated 2020-08-24 09:58:25 +08:00

Updated 2021-03-13 08:17:33 +08:00

Joe's Sayma project plan

Updated 2019-07-03 23:28:38 +08:00

Updated 2020-03-06 11:04:59 +08:00

Open source laser wavemeter with NO expensive optics and NO machining

Updated 2019-12-12 18:49:33 +08:00

Testing Thermostat v1 with ionpak

Updated 2019-09-13 18:15:10 +08:00

Trivial network-controlled plugs

Updated 2019-12-01 17:04:02 +08:00

Updated 2020-09-27 14:04:32 +08:00

Bare-metal Rust on the Xilinx Zynq ZC706 devkit

Updated 2020-01-06 02:15:21 +08:00

Bare-metal Rust on the Xilinx Zynq ZC706 devkit

Updated 2021-01-28 12:33:09 +08:00

ARTIQ Zynq-based core device support

Updated 2022-03-10 16:09:45 +08:00

Updated 2021-02-22 07:17:56 +08:00

WinF*VM

Updated 2020-06-30 16:22:55 +08:00

Updated 2020-07-09 15:58:51 +08:00

Updated 2021-12-17 18:44:29 +08:00

A port of [riscv-formal](https://github.com/SymbioticEDA/riscv-formal) to nMigen

Updated 2020-09-21 13:45:43 +08:00

Updated 2020-07-29 15:18:05 +08:00

Bare-metal Rust on the Xilinx Zynq ZC706 devkit

Updated 2021-07-13 15:41:58 +08:00

ARTIQ Zynq-based core device support

Updated 2023-01-29 00:15:41 +08:00