forked from M-Labs/web2019
remove minerva link
This commit is contained in:
parent
a5d32e547d
commit
cb70b8757a
@ -24,7 +24,7 @@ Although Migen works very well in production (it is used, for instance, in the [
|
|||||||
|
|
||||||
##### Environment
|
##### Environment
|
||||||
|
|
||||||
nMigen itself provides the core language, and is complemented by a number of external components. The nmigen-boards package contains definition files for various FPGA boards, providing information such as pin locations and clocks. The nmigen-stdio package provides libraries to interface to common I/O protocols such as I2C and SPI. The nmigen-soc package is a library that provides bus interconnect and configuration and status register (CSR) management. Finally, the HeavyX system uses all the previous components and integrates them into a complete system-on-chip solution, able to run Rust code on the <a href="https://github.com/lambdaconcept/minerva" target="_blank" rel="noopener noreferrer">Minerva RISC-V CPU core</a> entirely written in nMigen.
|
nMigen itself provides the core language, and is complemented by a number of external components. The nmigen-boards package contains definition files for various FPGA boards, providing information such as pin locations and clocks. The nmigen-stdio package provides libraries to interface to common I/O protocols such as I2C and SPI. The nmigen-soc package is a library that provides bus interconnect and configuration and status register (CSR) management. Finally, the HeavyX system uses all the previous components and integrates them into a complete system-on-chip solution, able to run Rust code on a RISC-V CPU core entirely written in nMigen.
|
||||||
|
|
||||||
##### Documentation
|
##### Documentation
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user