forked from M-Labs/thermostat
setup clocks to 168 mhz, adjust TIMER_RATE to 20
systick must elapse more often at higher clock.
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58ac89b66e
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3f6bb05001
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@ -73,10 +73,10 @@ fn main() -> ! {
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stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
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stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
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let clocks = dp.RCC.constrain()
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let clocks = dp.RCC.constrain()
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.cfgr
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.cfgr
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.sysclk(84.mhz())
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.sysclk(168.mhz())
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.hclk(84.mhz())
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.hclk(168.mhz())
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.pclk1(16.mhz())
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.pclk1(32.mhz())
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.pclk2(32.mhz())
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.pclk2(64.mhz())
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.freeze();
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.freeze();
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let mut wd = IndependentWatchdog::new(dp.IWDG);
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let mut wd = IndependentWatchdog::new(dp.IWDG);
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@ -9,7 +9,7 @@ use stm32f4xx_hal::{
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};
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};
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/// Rate in Hz
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/// Rate in Hz
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const TIMER_RATE: u32 = 10;
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const TIMER_RATE: u32 = 20;
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/// Interval duration in milliseconds
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/// Interval duration in milliseconds
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const TIMER_DELTA: u32 = 1000 / TIMER_RATE;
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const TIMER_DELTA: u32 = 1000 / TIMER_RATE;
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/// Elapsed time in milliseconds
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/// Elapsed time in milliseconds
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