2019-03-07 23:27:33 +08:00
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#![no_std]
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#![no_main]
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2020-03-12 06:17:17 +08:00
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// TODO: #![deny(warnings, unused)]
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2019-03-07 23:27:33 +08:00
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2019-03-15 02:58:41 +08:00
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#[cfg(not(feature = "semihosting"))]
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2019-04-27 21:23:50 +08:00
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use panic_abort as _;
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2019-03-15 02:58:41 +08:00
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#[cfg(feature = "semihosting")]
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2019-04-27 21:23:50 +08:00
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use panic_semihosting as _;
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2019-03-07 23:27:33 +08:00
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2019-04-27 21:23:50 +08:00
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use log::{info, warn};
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2019-03-15 02:58:41 +08:00
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use core::fmt::Write;
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2019-03-12 01:23:52 +08:00
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use cortex_m::asm::wfi;
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2019-03-07 23:27:33 +08:00
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use cortex_m_rt::entry;
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2019-03-12 01:23:52 +08:00
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use embedded_hal::watchdog::{WatchdogEnable, Watchdog};
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use stm32f4xx_hal::{
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rcc::RccExt,
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watchdog::IndependentWatchdog,
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2020-03-13 01:31:43 +08:00
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time::{U32Ext, MegaHertz},
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2019-03-12 01:23:52 +08:00
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stm32::{CorePeripherals, Peripherals},
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};
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2019-03-22 00:41:33 +08:00
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use smoltcp::{
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time::Instant,
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wire::EthernetAddress,
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};
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2019-03-12 01:23:52 +08:00
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2020-03-12 07:50:24 +08:00
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mod init_log;
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use init_log::init_log;
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2020-03-09 07:27:35 +08:00
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mod pins;
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2020-03-12 06:16:48 +08:00
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use pins::Pins;
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mod ad7172;
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2020-03-13 04:27:03 +08:00
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mod ad5680;
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2019-03-13 05:52:39 +08:00
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mod net;
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mod server;
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use server::Server;
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2020-03-14 06:39:22 +08:00
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mod session;
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use session::{CHANNELS, Session, SessionOutput};
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mod command_parser;
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use command_parser::{Command, ShowCommand, PwmSetup, PwmMode};
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2019-03-15 01:13:25 +08:00
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mod timer;
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2020-03-19 04:51:30 +08:00
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mod pid;
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mod steinhart_hart;
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2019-03-15 01:13:25 +08:00
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2020-03-14 06:39:22 +08:00
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#[derive(Clone, Copy, Debug)]
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struct ChannelState {
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adc_data: Option<i32>,
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adc_time: Instant,
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}
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impl Default for ChannelState {
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fn default() -> Self {
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ChannelState {
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adc_data: None,
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adc_time: Instant::from_secs(0),
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}
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}
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}
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2019-03-07 23:27:33 +08:00
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2020-03-12 06:17:34 +08:00
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#[cfg(not(feature = "semihosting"))]
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const WATCHDOG_INTERVAL: u32 = 100;
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#[cfg(feature = "semihosting")]
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const WATCHDOG_INTERVAL: u32 = 10_000;
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2019-03-22 00:41:33 +08:00
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#[cfg(not(feature = "generate-hwaddr"))]
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const NET_HWADDR: [u8; 6] = [0x02, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
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2020-03-14 06:39:22 +08:00
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const TCP_PORT: u16 = 23;
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2019-03-15 02:58:41 +08:00
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2020-03-13 01:31:43 +08:00
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2020-03-14 06:39:22 +08:00
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const HSE: MegaHertz = MegaHertz(8);
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2020-03-13 01:31:43 +08:00
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2019-03-19 04:41:51 +08:00
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/// Initialization and main loop
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2019-03-07 23:27:33 +08:00
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#[entry]
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fn main() -> ! {
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2019-03-15 02:58:41 +08:00
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init_log();
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2020-03-14 06:39:22 +08:00
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info!("tecpak");
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2019-03-12 01:23:52 +08:00
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let mut cp = CorePeripherals::take().unwrap();
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2019-03-13 05:52:39 +08:00
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cp.SCB.enable_icache();
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cp.SCB.enable_dcache(&mut cp.CPUID);
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2019-03-12 01:23:52 +08:00
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let dp = Peripherals::take().unwrap();
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stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
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2020-03-13 01:31:43 +08:00
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2019-03-15 01:13:25 +08:00
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let clocks = dp.RCC.constrain()
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2019-03-12 01:23:52 +08:00
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.cfgr
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2020-03-13 01:31:43 +08:00
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.use_hse(HSE)
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2019-03-19 05:04:34 +08:00
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.sysclk(168.mhz())
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.hclk(168.mhz())
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.pclk1(32.mhz())
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.pclk2(64.mhz())
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2019-03-12 01:23:52 +08:00
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.freeze();
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let mut wd = IndependentWatchdog::new(dp.IWDG);
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2020-03-12 06:17:34 +08:00
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wd.start(WATCHDOG_INTERVAL.ms());
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2019-03-12 01:23:52 +08:00
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wd.feed();
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2020-03-13 00:26:14 +08:00
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let pins = Pins::setup(
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clocks, dp.TIM1, dp.TIM3,
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2020-03-13 02:24:57 +08:00
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dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOE, dp.GPIOF, dp.GPIOG,
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dp.SPI2, dp.SPI4, dp.SPI5
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2020-03-13 00:26:14 +08:00
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);
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2019-03-12 01:23:52 +08:00
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2020-03-12 06:16:48 +08:00
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let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap();
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2020-03-13 04:27:03 +08:00
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let mut dac0 = ad5680::Dac::new(pins.dac0_spi, pins.dac0_sync);
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dac0.set(0);
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let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync);
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dac1.set(0);
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2019-03-15 01:13:25 +08:00
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timer::setup(cp.SYST, clocks);
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2019-03-22 00:41:33 +08:00
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#[cfg(not(feature = "generate-hwaddr"))]
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let hwaddr = EthernetAddress(NET_HWADDR);
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#[cfg(feature = "generate-hwaddr")]
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let hwaddr = {
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let uid = stm32f4xx_hal::signature::Uid::get();
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EthernetAddress(hash2hwaddr::generate_hwaddr(uid))
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};
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info!("Net hwaddr: {}", hwaddr);
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2020-03-14 06:39:22 +08:00
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let mut channel_states = [ChannelState::default(); CHANNELS];
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2020-03-09 07:07:56 +08:00
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net::run(dp.ETHERNET_MAC, dp.ETHERNET_DMA, hwaddr, |iface| {
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2020-03-14 06:39:22 +08:00
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Server::<Session>::run(iface, |server| {
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2019-03-19 03:02:57 +08:00
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loop {
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let now = timer::now().0;
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2019-04-27 21:25:27 +08:00
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let instant = Instant::from_millis(i64::from(now));
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2019-03-19 04:17:27 +08:00
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cortex_m::interrupt::free(net::clear_pending);
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server.poll(instant)
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.unwrap_or_else(|e| {
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warn!("poll: {:?}", e);
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});
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2020-03-14 06:39:22 +08:00
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// ADC input
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adc.data_ready().unwrap().map(|channel| {
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2020-03-12 07:44:15 +08:00
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let data = adc.read_data().unwrap();
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2020-03-14 06:39:22 +08:00
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let state = &mut channel_states[usize::from(channel)];
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state.adc_data = Some(data);
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state.adc_time = instant;
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server.for_each(|_, session| session.set_report_pending(channel.into()));
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});
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// TCP protocol handling
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server.for_each(|mut socket, session| {
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if ! socket.is_open() {
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let _ = socket.listen(TCP_PORT);
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session.reset();
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} else if socket.can_send() && socket.can_recv() && socket.send_capacity() - socket.send_queue() > 128 {
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match socket.recv(|buf| session.feed(buf)) {
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Ok(SessionOutput::Nothing) => {}
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Ok(SessionOutput::Command(command)) => match command {
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Command::Quit =>
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socket.close(),
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Command::Reporting(reporting) => {
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let _ = writeln!(socket, "report={}", if reporting { "on" } else { "off" });
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}
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Command::Show(ShowCommand::Reporting) => {
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let _ = writeln!(socket, "report={}", if session.reporting() { "on" } else { "off" });
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}
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Command::Show(ShowCommand::Input) => {
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for (channel, state) in channel_states.iter().enumerate() {
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if let Some(adc_data) = state.adc_data {
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let _ = writeln!(
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socket, "t={} raw{}=0x{:06X}",
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state.adc_time, channel, adc_data
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);
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// TODO: show pwm status et al
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}
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}
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}
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Command::Show(ShowCommand::Pid) => {
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// for (channel, state) in states.iter().enumerate() {
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// let _ = writeln!(socket, "PID settings for channel {}", channel);
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// let pid = &state.pid;
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// let _ = writeln!(socket, "- target={:.4}", pid.get_target());
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// let p = pid.get_parameters();
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// macro_rules! out {
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// ($p: tt) => {
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// let _ = writeln!(socket, "- {}={:.4}", stringify!($p), p.$p);
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// };
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// }
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// out!(kp);
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// out!(ki);
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// out!(kd);
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// out!(output_min);
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// out!(output_max);
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// out!(integral_min);
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// out!(integral_max);
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// let _ = writeln!(socket, "");
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// }
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}
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Command::Show(ShowCommand::Pwm) => {
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// for (channel, state) in states.iter().enumerate() {
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// let _ = writeln!(
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// socket, "channel {}: PID={}",
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// channel,
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// if state.pid_enabled { "engaged" } else { "disengaged" }
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// );
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// for pin in TecPin::VALID_VALUES {
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// let (width, total) = match channel {
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// 0 => tec0.get(*pin),
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// 1 => tec1.get(*pin),
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// _ => unreachable!(),
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// };
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// let _ = writeln!(socket, "- {}={}/{}", pin, width, total);
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// }
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// let _ = writeln!(socket, "");
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// }
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}
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Command::Show(ShowCommand::SteinhartHart) => {
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// for (channel, state) in states.iter().enumerate() {
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// let _ = writeln!(
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// socket, "channel {}: Steinhart-Hart equation parameters",
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// channel,
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// );
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// let _ = writeln!(socket, "- a={}", state.sh.a);
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// let _ = writeln!(socket, "- b={}", state.sh.b);
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// let _ = writeln!(socket, "- c={}", state.sh.c);
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// let _ = writeln!(socket, "- parallel_r={}", state.sh.parallel_r);
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// let _ = writeln!(socket, "");
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// }
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}
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Command::Show(ShowCommand::PostFilter) => {
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// for (channel, _) in states.iter().enumerate() {
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// match adc.get_postfilter(channel as u8).unwrap() {
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// Some(filter) => {
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// let _ = writeln!(
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// socket, "channel {}: postfilter={:.2} SPS",
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// channel, filter.output_rate().unwrap()
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// );
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// }
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// None => {
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// let _ = writeln!(
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// socket, "channel {}: no postfilter",
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// channel
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// );
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// }
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// }
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// }
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}
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Command::Pwm { channel, setup: PwmSetup::ISet(PwmMode::Pid) } => {
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// states[channel].pid_enabled = true;
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// let _ = writeln!(socket, "channel {}: PID enabled to control PWM", channel
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// );
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}
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Command::Pwm { channel, setup: PwmSetup::ISet(PwmMode::Manual(config))} => {
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// states[channel].pid_enabled = false;
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// let PwmConfig { width, total } = config;
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// match channel {
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// 0 => tec0.set(TecPin::ISet, width, total),
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// 1 => tec1.set(TecPin::ISet, width, total),
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// _ => unreachable!(),
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// }
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// let _ = writeln!(
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// socket, "channel {}: PWM duty cycle manually set to {}/{}",
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// channel, config.width, config.total
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// );
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}
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Command::Pwm { channel, setup } => {
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// let (pin, config) = match setup {
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// PwmSetup::ISet(_) =>
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// // Handled above
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// unreachable!(),
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// PwmSetup::MaxIPos(config) =>
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// (TecPin::MaxIPos, config),
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// PwmSetup::MaxINeg(config) =>
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// (TecPin::MaxINeg, config),
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// PwmSetup::MaxV(config) =>
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// (TecPin::MaxV, config),
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// };
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// let PwmConfig { width, total } = config;
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// match channel {
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// 0 => tec0.set(pin, width, total),
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// 1 => tec1.set(pin, width, total),
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// _ => unreachable!(),
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// }
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// let _ = writeln!(
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// socket, "channel {}: PWM {} reconfigured to {}/{}",
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// channel, pin, width, total
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// );
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}
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Command::Pid { channel, parameter, value } => {
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// let pid = &mut states[channel].pid;
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// use command_parser::PidParameter::*;
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// match parameter {
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// Target =>
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// pid.set_target(value),
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// KP =>
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// pid.update_parameters(|parameters| parameters.kp = value),
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// KI =>
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// pid.update_parameters(|parameters| parameters.ki = value),
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// KD =>
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// pid.update_parameters(|parameters| parameters.kd = value),
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// OutputMin =>
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// pid.update_parameters(|parameters| parameters.output_min = value),
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// OutputMax =>
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// pid.update_parameters(|parameters| parameters.output_max = value),
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// IntegralMin =>
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// pid.update_parameters(|parameters| parameters.integral_min = value),
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// IntegralMax =>
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// pid.update_parameters(|parameters| parameters.integral_max = value),
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// }
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// pid.reset();
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// let _ = writeln!(socket, "PID parameter updated");
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}
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Command::SteinhartHart { channel, parameter, value } => {
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// let sh = &mut states[channel].sh;
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// use command_parser::ShParameter::*;
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// match parameter {
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// A => sh.a = value,
|
|
|
|
// B => sh.b = value,
|
|
|
|
// C => sh.c = value,
|
|
|
|
// ParallelR => sh.parallel_r = value,
|
|
|
|
// }
|
|
|
|
// let _ = writeln!(socket, "Steinhart-Hart equation parameter updated");
|
|
|
|
}
|
|
|
|
Command::PostFilter { channel, rate } => {
|
|
|
|
// let filter = ad7172::PostFilter::closest(rate);
|
|
|
|
// match filter {
|
|
|
|
// Some(filter) => {
|
|
|
|
// adc.set_postfilter(channel as u8, Some(filter)).unwrap();
|
|
|
|
// let _ = writeln!(
|
|
|
|
// socket, "channel {}: postfilter set to {:.2} SPS",
|
|
|
|
// channel, filter.output_rate().unwrap()
|
|
|
|
// );
|
|
|
|
// }
|
|
|
|
// None => {
|
|
|
|
// let _ = writeln!(socket, "Unable to choose postfilter");
|
|
|
|
// }
|
|
|
|
// }
|
|
|
|
}
|
|
|
|
}
|
|
|
|
Ok(SessionOutput::Error(e)) => {
|
|
|
|
let _ = writeln!(socket, "Command error: {:?}", e);
|
|
|
|
}
|
|
|
|
Err(_) =>
|
|
|
|
socket.close(),
|
|
|
|
}
|
|
|
|
} else if socket.can_send() && socket.send_capacity() - socket.send_queue() > 256 {
|
|
|
|
while let Some(channel) = session.is_report_pending() {
|
|
|
|
let state = &mut channel_states[usize::from(channel)];
|
|
|
|
let _ = writeln!(
|
|
|
|
socket, "t={} raw{}=0x{:04X}",
|
|
|
|
state.adc_time, channel, state.adc_data.unwrap_or(0)
|
|
|
|
).map(|_| {
|
|
|
|
session.mark_report_sent(channel);
|
|
|
|
});
|
|
|
|
}
|
|
|
|
}
|
|
|
|
});
|
2020-03-12 07:44:15 +08:00
|
|
|
|
2019-03-19 03:02:57 +08:00
|
|
|
// Update watchdog
|
|
|
|
wd.feed();
|
|
|
|
|
2020-03-12 07:44:15 +08:00
|
|
|
// cortex_m::interrupt::free(|cs| {
|
|
|
|
// if !net::is_pending(cs) {
|
|
|
|
// // Wait for interrupts
|
|
|
|
// wfi();
|
|
|
|
// }
|
|
|
|
// });
|
2019-03-15 01:13:25 +08:00
|
|
|
}
|
2019-03-19 03:02:57 +08:00
|
|
|
});
|
|
|
|
});
|
2019-03-15 03:43:35 +08:00
|
|
|
|
2019-03-19 04:17:27 +08:00
|
|
|
unreachable!()
|
2019-03-07 23:27:33 +08:00
|
|
|
}
|