forked from M-Labs/artiq-zynq
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213-satman
Author | SHA1 | Date | |
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c54be54470 | |||
8822f2493e | |||
e51a5728e0 |
@ -1,4 +1,4 @@
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use crate::i2c;
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use libboard_zynq::i2c;
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use log::info;
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// Only the bare minimum registers. Bits/IO connections equivalent between IC types.
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@ -10,10 +10,9 @@ struct Registers {
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gpiob: u8, // Output Port 1
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}
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pub struct IoExpander {
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busno: i32,
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port: u8,
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address: i32,
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pub struct IoExpander<'a> {
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i2c: &'a mut i2c::I2c,
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address: u8,
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iodir: [u8; 2],
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out_current: [u8; 2],
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out_target: [u8; 2],
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@ -21,14 +20,13 @@ pub struct IoExpander {
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}
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impl IoExpander {
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pub fn new(index: u8) -> Result<Self, &'static str> {
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impl<'a> IoExpander<'a> {
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pub fn new(i2c: &'a mut i2c::I2c, index: u8) -> Result<Self, &'static str> {
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// Both expanders on SHARED I2C bus
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let mut io_expander = match index {
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0 => IoExpander {
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busno: 0,
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port: 11,
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i2c,
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address: 0x40,
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iodir: [0xff; 2],
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out_current: [0; 2],
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@ -41,8 +39,7 @@ impl IoExpander {
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},
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},
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1 => IoExpander {
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busno: 0,
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port: 11,
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i2c,
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address: 0x42,
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iodir: [0xff; 2],
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out_current: [0; 2],
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@ -75,32 +72,31 @@ impl IoExpander {
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Ok(io_expander)
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}
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fn select(&self) -> Result<(), &'static str> {
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let mask: u16 = 1 << self.port;
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i2c::switch_select(self.busno, 0x70, mask as u8 as i32);
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i2c::switch_select(self.busno, 0x71, (mask >> 8) as u8 as i32);
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fn select(&mut self) -> Result<(), &'static str> {
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self.i2c.pca954x_select(0x70, None)?;
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self.i2c.pca954x_select(0x71, Some(3))?;
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Ok(())
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}
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fn write(&self, addr: u8, value: u8) -> Result<(), &'static str> {
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i2c::start(self.busno);
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i2c::write(self.busno, self.address as i32);
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i2c::write(self.busno, addr as i32);
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i2c::write(self.busno, value as i32);
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i2c::stop(self.busno);
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fn write(&mut self, addr: u8, value: u8) -> Result<(), &'static str> {
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self.i2c.start()?;
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self.i2c.write(self.address)?;
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self.i2c.write(addr)?;
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self.i2c.write(value)?;
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self.i2c.stop()?;
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Ok(())
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}
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fn check_ack(&self) -> Result<bool, &'static str> {
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fn check_ack(&mut self) -> Result<bool, &'static str> {
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// Check for ack from io expander
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self.select()?;
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i2c::start(self.busno);
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let ack = i2c::write(self.busno, self.address);
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i2c::stop(self.busno);
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self.i2c.start()?;
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let ack = self.i2c.write(self.address)?;
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self.i2c.stop()?;
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Ok(ack)
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}
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fn update_iodir(&self) -> Result<(), &'static str> {
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fn update_iodir(&mut self) -> Result<(), &'static str> {
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self.write(self.registers.iodira, self.iodir[0])?;
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self.write(self.registers.iodirb, self.iodir[1])?;
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Ok(())
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@ -27,6 +27,8 @@ pub mod drtioaux_async;
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#[cfg(has_drtio)]
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#[path = "../../../build/mem.rs"]
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pub mod mem;
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#[cfg(feature = "target_kasli_soc")]
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pub mod io_expander;
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use core::{cmp, str};
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@ -22,6 +22,8 @@ use void::Void;
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use libconfig::Config;
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use libcortex_a9::l2c::enable_l2_cache;
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use libboard_artiq::{logger, identifier_read, pl};
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#[cfg(feature = "target_kasli_soc")]
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use libboard_artiq::io_expander;
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const ASYNC_ERROR_COLLISION: u8 = 1 << 0;
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const ASYNC_ERROR_BUSY: u8 = 1 << 1;
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@ -46,8 +48,6 @@ mod mgmt;
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mod analyzer;
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mod irq;
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mod i2c;
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#[cfg(feature = "target_kasli_soc")]
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mod io_expander;
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static mut SEEN_ASYNC_ERRORS: u8 = 0;
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@ -117,21 +117,17 @@ pub fn main_core0() {
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#[cfg(feature = "target_kasli_soc")]
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{
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let (mut io_expander0, mut io_expander1) = (io_expander::IoExpander::new(0).unwrap(), io_expander::IoExpander::new(1).unwrap());
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io_expander0.init().expect("I2C I/O expander #0 initialization failed");
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io_expander1.init().expect("I2C I/O expander #1 initialization failed");
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// Actively drive TX_DISABLE to false on SFP0..3
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io_expander0.set_oe(0, 1 << 1).unwrap();
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io_expander0.set_oe(1, 1 << 1).unwrap();
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io_expander1.set_oe(0, 1 << 1).unwrap();
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io_expander1.set_oe(1, 1 << 1).unwrap();
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io_expander0.set(0, 1, false);
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io_expander0.set(1, 1, false);
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io_expander1.set(0, 1, false);
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io_expander1.set(1, 1, false);
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io_expander0.service().unwrap();
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io_expander1.service().unwrap();
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let i2c = unsafe { (&mut i2c::I2C_BUS).as_mut().unwrap() };
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for expander_i in 0..=1 {
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let mut io_expander = io_expander::IoExpander::new(i2c, expander_i).unwrap();
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io_expander.init().expect("I2C I/O expander #0 initialization failed");
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// Actively drive TX_DISABLE to false on SFP0..3
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io_expander.set_oe(0, 1 << 1).unwrap();
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io_expander.set_oe(1, 1 << 1).unwrap();
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io_expander.set(0, 1, false);
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io_expander.set(1, 1, false);
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io_expander.service().unwrap();
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}
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}
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let cfg = match Config::new() {
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@ -22,6 +22,8 @@ use libboard_zynq::{i2c::I2c, timer::GlobalTimer, time::Milliseconds, print, pri
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use libsupport_zynq::ram;
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#[cfg(has_si5324)]
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use libboard_artiq::si5324;
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#[cfg(feature = "target_kasli_soc")]
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use libboard_artiq::io_expander;
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use libboard_artiq::{pl::csr, drtio_routing, drtioaux, logger, identifier_read};
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use libcortex_a9::{spin_lock_yield, interrupt_handler, regs::{MPIDR, SP}, notify_spin_lock, asm, l2c::enable_l2_cache};
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use libregister::{RegisterW, RegisterR};
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@ -449,6 +451,19 @@ pub extern fn main_core0() -> i32 {
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let mut i2c = I2c::i2c0();
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i2c.init().expect("I2C initialization failed");
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#[cfg(feature = "target_kasli_soc")]
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{
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for expander_i in 0..=1 {
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let mut io_expander = io_expander::IoExpander::new(&mut i2c, expander_i).unwrap();
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io_expander.init().expect("I2C I/O expander #0 initialization failed");
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// Actively drive TX_DISABLE to false on SFP0..3
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io_expander.set_oe(0, 1 << 1).unwrap();
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io_expander.set_oe(1, 1 << 1).unwrap();
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io_expander.set(0, 1, false);
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io_expander.set(1, 1, false);
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io_expander.service().unwrap();
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}
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}
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#[cfg(has_si5324)]
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si5324::setup(&mut i2c, &SI5324_SETTINGS, si5324::Input::Ckin1, &mut timer).expect("cannot initialize Si5324");
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