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dsleung
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2020-05-28
Repositories
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M-Labs/riscv-formal-nmigen
2020-08-11 14:00:11 +08:00
0f71c1dad1
Add RV32I S-Type Instruction Format
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M-Labs/riscv-formal-nmigen
2020-08-11 10:08:19 +08:00
70c417f920
Update README.md
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M-Labs/riscv-formal-nmigen
2020-08-10 17:37:55 +08:00
c938eefe41
Update README.md
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M-Labs/riscv-formal-nmigen
2020-08-10 17:35:51 +08:00
31753e3679
Add ANDI instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 17:34:29 +08:00
c258d541af
Add ORI instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 17:33:05 +08:00
4b79b06dba
Add XORI instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 17:30:02 +08:00
71f8a594a6
Add SLTIU instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 17:24:59 +08:00
84f4b75267
Add SLTI instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 17:20:05 +08:00
0ae11e12b5
Add ADDI instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 17:12:24 +08:00
036f842faa
Add RV32I I-Type Instruction (Arithmetic Variation)
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M-Labs/riscv-formal-nmigen
2020-08-10 16:47:19 +08:00
d60c712704
Update README.md
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M-Labs/riscv-formal-nmigen
2020-08-10 16:44:15 +08:00
42b8e5c245
Add LHU instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 16:40:53 +08:00
462e526e71
Add LBU instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 16:35:44 +08:00
7b440f0fa9
Add LW instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 16:29:51 +08:00
c88cf830fc
Add LH instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 16:26:36 +08:00
167d654be8
Add LB instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 16:16:39 +08:00
bfd8f670c2
Add RV32I I-Type Instruction (Load Variation)
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M-Labs/riscv-formal-nmigen
2020-08-10 14:14:48 +08:00
10296cbf3b
Update README
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M-Labs/riscv-formal-nmigen
2020-08-10 14:13:32 +08:00
1cae183569
Add JALR instruction
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M-Labs/riscv-formal-nmigen
2020-08-10 13:32:12 +08:00
e97a86bfbe
Add (generic) RV32I I-Type Instruction
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