|Donald Sebastian Leung 5a78e7aba0||2 days ago|
|checks||6 days ago|
|insns||1 week ago|
|LICENSE||2 days ago|
|README.md||1 week ago|
A port of riscv-formal to nMigen
The full RISC-V specification is hundreds of pages long including numerous possible extensions, some of which are still under active development at the time of writing. Therefore, this project does not aim to formalize the entire specification, but only the core parts of the specification, namely RV32I (except FENCE, ECALL and EBREAK) and perhaps RV32IM. Support for other extensions of the RISC-V specification may be added in the future.