migen: bump

This reverts commit 09fd2cf946.

artiq-board-generated/artiq-board.nix

@@ -11,9 +11,10 @@ let
   pythonEnv = pkgs.python3.withPackages (ps: with ps; [
     jinja2 jsonschema numpy artiqpkgs.migen artiqpkgs.microscope artiqpkgs.misoc artiqpkgs.jesd204b artiqpkgs.artiq
   ]);
-  fetchcargo = import (artiq-fast + "/fetchcargo.nix") {
+  fetchcargo = import (artiq-fast + "/fetchcargo-legacy.nix") {
     inherit (pkgs) stdenv lib cacert git;
-    inherit (artiqpkgs) cargo cargo-vendor;
+    cargo = artiqpkgs.cargo-legacy;
+    cargo-vendor = artiqpkgs.cargo-vendor-legacy;
   };
   cargoDeps = fetchcargo rec {
     name = "artiq-firmware-cargo-deps";
@@ -64,8 +65,8 @@ pkgs.stdenv.mkDerivation {
   phases = [ "buildPhase" "installPhase" ];
   nativeBuildInputs = [
     pkgs.gnumake pkgs.which pythonEnv
-    artiqpkgs.cargo
+    artiqpkgs.cargo-legacy
-    artiqpkgs.rustc
+    artiqpkgs.rustc-legacy
     artiqpkgs.binutils-or1k
     artiqpkgs.llvm-or1k
   ];

artiq-fast.nix

@@ -1,5 +1,5 @@
 let
-  pkgs = import <nixpkgs> {};
+  pkgs = import <nixpkgs> { overlays = [ (import ./artiq-fast/mozilla-overlay.nix) ]; };
   artiqSrc = <artiqSrc>;
   generatedNix = pkgs.runCommand "generated-nix" { buildInputs = [ pkgs.nix pkgs.git ]; }
     # keep in sync with artiq-fast/pkgs/artiq-version.nix
@@ -64,26 +64,25 @@ in
 
       buildInputs = [
         (pkgs.python3.withPackages(ps: [ ps.paramiko artiqpkgs.artiq artiqpkgs.artiq-board-kc705-nist_clock ]))
-        artiqpkgs.binutils-or1k
         artiqpkgs.openocd
         pkgs.openssh
-      ];
+      ] ++ (if (pkgs.lib.versionAtLeast artiqVersion "7.0") then [ pkgs.llvm_11 pkgs.lld_11 ] else [ artiqpkgs.binutils-or1k ]);
       phases = [ "buildPhase" ];
       buildPhase =
       ''
       export HOME=`mktemp -d`
       mkdir $HOME/.ssh
-      cp /opt/hydra_id_rsa $HOME/.ssh/id_rsa
+      cp /opt/hydra_id_ed25519 $HOME/.ssh/id_ed25519
-      cp /opt/hydra_id_rsa.pub $HOME/.ssh/id_rsa.pub
+      cp /opt/hydra_id_ed25519.pub $HOME/.ssh/id_ed25519.pub
       echo "rpi-1 ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIPOBQVcsvk6WgRj18v4m0zkFeKrcN9gA+r6sxQxNwFpv" > $HOME/.ssh/known_hosts
-      chmod 600 $HOME/.ssh/id_rsa
+      chmod 600 $HOME/.ssh/id_ed25519
       LOCKCTL=$(mktemp -d)
       mkfifo $LOCKCTL/lockctl
 
       cat $LOCKCTL/lockctl | ${pkgs.openssh}/bin/ssh \
-        -i $HOME/.ssh/id_rsa \
+        -i $HOME/.ssh/id_ed25519 \
         -o UserKnownHostsFile=$HOME/.ssh/known_hosts \
-        sb@rpi-1 \
+        rpi-1 \
         'mkdir -p /tmp/board_lock && flock /tmp/board_lock/kc705-1 -c "echo Ok; cat"' \
       | (
         # End remote flock via FIFO

artiq-fast/artiq-board.nix

@@ -2,25 +2,27 @@
 #  nix.sandboxPaths = ["/opt"];
 
 { pkgs
+, rustPlatform
 , vivado ? import ./vivado.nix { inherit pkgs; }
 }:
 
 let
   artiqSrc = import ./pkgs/artiq-src.nix { fetchgit = pkgs.fetchgit; };
   artiqpkgs = import ./default.nix { inherit pkgs; };
-  fetchcargo = import ./fetchcargo.nix {
+
+  fetchcargo-legacy = import ./fetchcargo-legacy.nix {
     inherit (pkgs) stdenv lib cacert git;
-    inherit (artiqpkgs) cargo cargo-vendor;
+    cargo = artiqpkgs.cargo-legacy;
+    cargo-vendor = artiqpkgs.cargo-vendor-legacy;
   };
-  cargoDeps = fetchcargo rec {
+  cargoDeps-legacy = fetchcargo-legacy rec {
     name = "artiq-firmware-cargo-deps";
     src = "${artiqSrc}/artiq/firmware";
     sha256 = (import "${artiqSrc}/artiq/firmware/cargosha256.nix");
   };
-
+  cargoVendored-legacy = pkgs.stdenv.mkDerivation {
-  cargoVendored = pkgs.stdenv.mkDerivation {
     name = "artiq-firmware-cargo-vendored";
-    src = cargoDeps;
+    src = cargoDeps-legacy;
     phases = [ "unpackPhase" "installPhase" ];
     installPhase =
       ''
@@ -42,6 +44,26 @@ let
       '';
   };
 
+  cargoDeps = rustPlatform.fetchCargoTarball {
+    name = "artiq-firmware-cargo-deps";
+    src = "${artiqSrc}/artiq/firmware";
+    sha256 = "sha256-Lf6M4M/jdRiO5MsWSoqtOSNfRIhbze+qvg4kaiiBWW4=";
+  };
+
+  cargo-xbuild = rustPlatform.buildRustPackage rec {
+    pname = "cargo-xbuild";
+    version = "0.6.5";
+    src = pkgs.fetchFromGitHub {
+      owner = "rust-osdev";
+      repo = pname;
+      rev = "v${version}";
+      sha256 = "18djvygq9v8rmfchvi2hfj0i6fhn36m716vqndqnj56fiqviwxvf";
+    };
+    cargoSha256 = "13sj9j9kl6js75h9xq0yidxy63vixxm9q3f8jil6ymarml5wkhx8";
+  };
+
+  artiq7 = pkgs.lib.strings.versionAtLeast artiqpkgs.artiq.version "7.0";
+
 in
 { target
 , variant
@@ -56,25 +78,44 @@ pkgs.python3Packages.toPythonModule (pkgs.stdenv.mkDerivation rec {
   name = "artiq-board-${target}-${variant}-${version}";
   version = import ./pkgs/artiq-version.nix (with pkgs; { inherit stdenv fetchgit git; });
   inherit src;
-  phases = [ "buildPhase" "installCheckPhase" "installPhase" "checkPhase" ];
+  phases = [ "buildPhase" "checkPhase" "installPhase" ];
-  nativeBuildInputs = [
+  nativeBuildInputs = [ vivado pkgs.gnumake ]
-    vivado
+    ++ (if artiq7
-    pkgs.gnumake
+      then [
-    artiqpkgs.cargo
+        rustPlatform.rust.rustc
-    artiqpkgs.rustc
+        rustPlatform.rust.cargo
-    artiqpkgs.binutils-or1k
+        pkgs.llvmPackages_11.clang-unwrapped
-    artiqpkgs.llvm-or1k
+        pkgs.llvm_11
-  ];
+        pkgs.lld_11
-  buildInputs = [ (pkgs.python3.withPackages(ps: with ps; [ jinja2 numpy artiqpkgs.migen artiqpkgs.microscope artiqpkgs.misoc artiqpkgs.jesd204b artiqpkgs.artiq ])) ];
+        rustPlatform.cargoSetupHook
-  buildPhase = 
+        cargo-xbuild
-    ''
+      ] else [
-    export CARGO_HOME=${cargoVendored}
+        artiqpkgs.cargo-legacy
-    export TARGET_AR=or1k-linux-ar
+        artiqpkgs.rustc-legacy
-    ${buildCommand}
+        artiqpkgs.binutils-or1k
-    '';
+        artiqpkgs.llvm-or1k
+      ]);
+  buildInputs = [ (pkgs.python3.withPackages(ps: with ps; [ artiqpkgs.migen artiqpkgs.microscope artiqpkgs.misoc artiqpkgs.jesd204b artiqpkgs.artiq ] ++ (pkgs.lib.optional artiq7 jsonschema))) ];
+  buildPhase = if artiq7
+    then
+      ''
+      ARTIQ_PATH=`python -c "import artiq; print(artiq.__path__[0])"`
+      ln -s $ARTIQ_PATH/firmware/Cargo.lock .
+      cargoDeps=${cargoDeps}
+      cargoSetupPostUnpackHook
+      cargoSetupPostPatchHook
+      export TARGET_AR=llvm-ar
+      ${buildCommand}
+      ''
+    else
+      ''
+      export CARGO_HOME=${cargoVendored-legacy}
+      export TARGET_AR=or1k-linux-ar
+      ${buildCommand}
+      '';
   # temporarily disabled because there is currently always at least one Kasli bitstream
   # that fails timing and blocks the conda channel.
-  doCheck = false;
+  doCheck = artiq7;
   checkPhase = ''
     # Search for PCREs in the Vivado output to check for errors
     check_log() {

artiq-fast/conda-windows/llvmlite-artiq.nix

@@ -37,7 +37,7 @@ let
           - cmake
           - llvm-or1k
         run:
-          - python<3.8
+          - python<3.9
       EOF
 
       cat > bld.bat << EOF

artiq-fast/conda/artiq.nix

@@ -7,8 +7,6 @@ let
     inherit version;
     src = import ../pkgs/artiq-src.nix { fetchgit = pkgs.fetchgit; };
     dependencies = [
-      "llvmlite-artiq"
-      "binutils-or1k-linux"
       "pythonparser"
       "scipy"
       "numpy"
@@ -21,7 +19,7 @@ let
       "pygit2"
       "python-levenshtein"
       "sipyco"
-    ];
+    ] ++ (if (pkgs.lib.strings.versionAtLeast version "7.0") then ["llvmlite" "llvm-tools" "lld"] else ["llvmlite-artiq" "binutils-or1k-linux"]);
     extraYaml =
     ''
     about:

artiq-fast/conda/bscan-spi-bitstreams.nix

@@ -6,7 +6,7 @@ let
     mkdir -p $out/fake-conda;
 
     # work around yet more idiotic conda behavior - build breaks if write permissions aren't set on source files.
-    cp --no-preserve=mode,ownership -R ${bscan_spi_bitstreams} workaround-conda
+    cp --no-preserve=mode,ownership -L -R ${bscan_spi_bitstreams} workaround-conda
     pushd workaround-conda
     tar cf $out/src.tar .
     popd

artiq-fast/conda/build.nix

@@ -15,7 +15,7 @@ assert (name != null) -> pname == null && version == null;
 let
   condaBuilderEnv = import ./builder-env.nix { inherit pkgs; };
   realName = if (name != null) then name else "${pname}-${version}";
-in pkgs.stdenv.mkDerivation {
+in pkgs.stdenvNoCC.mkDerivation {
   name = realName;
   inherit src;
   buildCommand =

artiq-fast/conda/builder-env.nix

@@ -3,14 +3,21 @@
 with pkgs;
 
 let
-  condaDeps = [ stdenv.cc xorg.libSM xorg.libICE xorg.libX11 xorg.libXau xorg.libXi xorg.libXrender libselinux libGL ];
+  condaDeps = [ zlib xorg.libSM xorg.libICE xorg.libX11 xorg.libXau xorg.libXi xorg.libXrender libselinux libGL ];
   # Use the full Anaconda distribution, which already contains conda-build and its many dependencies,
   # so we don't have to manually deal with them.
   condaInstaller = fetchurl {
-    url = "https://repo.anaconda.com/archive/Anaconda3-2019.03-Linux-x86_64.sh";
+    url = "https://repo.anaconda.com/archive/Anaconda3-2021.05-Linux-x86_64.sh";
-    sha256 = "0fmpdd5876ylds98mydmv5klnwlzasa461k0l1f4vhbw96vm3j25";
+    sha256 = "0lrxwd3pwz8k3jxwgkd9x47wgkqqy9s8m7hgx1x2gw4gcwysnl97";
   };
-  condaSrcChmod = runCommand "conda-src-chmod" { } "mkdir $out; cp ${condaInstaller} $out/conda-installer.sh; chmod +x $out/conda-installer.sh";
+  condaSrcChmod = runCommand "conda-src-chmod" { }
+    ''
+    mkdir $out
+    cp ${condaInstaller} $out/conda-installer.sh
+    chmod +x $out/conda-installer.sh
+    # keep the same file length to avoid breaking embedded payload offsets
+    sed -i 0,/unset\ LD_LIBRARY_PATH/s//\#nset\ LD_LIBRARY_PATH/ $out/conda-installer.sh
+    '';
   condaInstallerEnv = buildFHSUserEnv {
     name = "conda-installer-env";
     targetPkgs = pkgs: ([ condaSrcChmod ] ++ condaDeps);
@@ -26,7 +33,7 @@ let
   condaInstalled = runCommand "conda-installed" { }
     ''
     ${condaInstallerEnv}/bin/conda-installer-env -c "${condaSrcChmod}/conda-installer.sh -p $out -b"
-    substituteInPlace $out/lib/python3.7/site-packages/conda/gateways/disk/__init__.py \
+    substituteInPlace $out/lib/python3.8/site-packages/conda/gateways/disk/__init__.py \
       --replace "os.chmod(path, 0o2775)" "pass"
 
     # The conda garbage breaks if the package filename is prefixed with the Nix store hash.
@@ -36,10 +43,15 @@ let
     ln -s ${libiconv} ${libiconv-filename}
     ${condaInstallerEnv}/bin/conda-installer-env -c "$out/bin/conda install ${libiconv-filename}"
     '';
+
+  binutils-fhs = (pkgs.binutils.overrideAttrs(oa: {postFixup = oa.postFixup + "echo /lib64/ld-linux-x86-64.so.2 > $out/nix-support/dynamic-linker";}));
+  gcc-fhs = (pkgs.gcc.override {bintools = binutils-fhs;} );
 in
   buildFHSUserEnv {
     name = "conda-builder-env";
     targetPkgs = pkgs: ([ condaInstalled ] ++ condaDeps ++ [
+        binutils-fhs
+        gcc-fhs
         # for llvm-or1k
         cmake
       ]

artiq-fast/conda/llvmlite-artiq.nix

@@ -25,7 +25,7 @@ let
     # that they are not there if they have been installed from files.
     requirements:
       run:
-        - python<3.8
+        - python<3.9
         - ncurses [linux]
     EOF
 

artiq-fast/conda/llvmlite-patched.nix

@@ -0,0 +1,88 @@
+{ pkgs, src }:
+
+let
+  condaBuilderEnv = import ./builder-env.nix { inherit pkgs; };
+  fake-src = pkgs.runCommand "conda-fake-source-llvmlite" { }
+    ''
+    mkdir -p $out/fake-conda;
+
+    mkdir conda-sucks
+    pushd conda-sucks
+    tar xvf ${src} --strip-components=1
+    tar cf $out/src.tar .
+    patch -p1 < ${../pkgs/llvmlite-callsite.diff}
+    patch -p1 < ${../pkgs/llvmlite-abiname.diff}
+    popd
+    rm -rf conda-sucks
+
+    cat << EOF > $out/fake-conda/meta.yaml
+    package:
+      name: llvmlite
+      version: 0.99  # high version number to entice the conda filth to choose it over others
+
+    source:
+      url: ../src.tar
+
+    # Again, we don't specify build dependencies since the conda garbage mistakenly thinks
+    # that they are not there if they have been installed from files.
+    requirements:
+      run:
+        - libllvm11
+        - python<3.9
+        - zlib
+    EOF
+
+    cat << EOF > $out/fake-conda/build.sh
+    #!/bin/bash
+    set -e
+
+    export LD_LIBRARY_PATH=/lib
+    python setup.py install \
+      --prefix=\$PREFIX \
+      --single-version-externally-managed \
+      --record=record.txt \
+      --no-compile
+
+    EOF
+    chmod 755 $out/fake-conda/build.sh
+    '';
+  conda-zlib = pkgs.fetchurl {
+    url = "https://anaconda.org/conda-forge/zlib/1.2.11/download/linux-64/zlib-1.2.11-h36c2ea0_1013.tar.bz2";
+    sha256 = "sha256-zsSNs1p97wARv9qiuR5eBdKgrXiLiHGiE+uMrP63QYo=";
+  };
+  conda-llvm = pkgs.fetchurl {
+    url = "https://anaconda.org/conda-forge/llvm/11.1.0/download/linux-64/llvm-11.1.0-h32600fe_2.tar.bz2";
+    sha256 = "sha256-E+jnVeGHad3LH+dKqFKH0/lBuQqZKtybXF44uArmNz8=";
+  };
+  conda-llvm-tools = pkgs.fetchurl {
+    url = "https://anaconda.org/conda-forge/llvm-tools/11.1.0/download/linux-64/llvm-tools-11.1.0-hf817b99_2.tar.bz2";
+    sha256 = "sha256-Y87krT+d9vdVIPliJVc/szIVBRA3NNcUDdY9Gc9KpXg=";
+  };
+  conda-llvmdev = pkgs.fetchurl {
+    url = "https://anaconda.org/conda-forge/llvmdev/11.1.0/download/linux-64/llvmdev-11.1.0-hf817b99_2.tar.bz2";
+    sha256 = "sha256-vN87BWggPfpFp51Qm60R3D5krQ4AQwiEJaqPfVb6x40=";
+  };
+in
+  pkgs.stdenv.mkDerivation {
+    name = "conda-llvmlite";
+    src = fake-src;
+    buildCommand =
+      ''
+      HOME=`pwd`
+      mkdir $out
+      cat << EOF > conda-commands.sh
+      set -e
+
+      conda create --prefix ./conda_tmp ${conda-zlib} ${conda-llvm} ${conda-llvm-tools} ${conda-llvmdev}
+      conda init
+      source .bashrc
+      conda activate ./conda_tmp
+
+      conda build --no-anaconda-upload --no-test --output-folder $out $src/fake-conda
+      EOF
+      ${condaBuilderEnv}/bin/conda-builder-env conda-commands.sh
+
+      mkdir -p $out/nix-support
+      echo file conda $out/*/*.tar.bz2 >> $out/nix-support/hydra-build-products
+      '';
+  }

artiq-fast/default.nix

@@ -1,8 +1,10 @@
-{ pkgs ? import <nixpkgs> {}}:
+{ pkgs ? import <nixpkgs> { overlays = [ (import ./mozilla-overlay.nix) ]; }}:
 with pkgs;
 let
   artiq6 = pkgs.lib.strings.versionAtLeast mainPackages.artiq.version "6.0";
-  pythonDeps = import ./pkgs/python-deps.nix { inherit (pkgs) lib fetchgit fetchFromGitHub python3Packages; misoc-new = artiq6; };
+  artiq7 = pkgs.lib.strings.versionAtLeast mainPackages.artiq.version "7.0";
+  pythonDeps = import ./pkgs/python-deps.nix { inherit (pkgs) lib fetchgit fetchFromGitHub python3Packages; misoc-new = artiq7; };
+  rustPlatform = import ./rust-platform.nix { inherit pkgs; };
 
   boards = [
     { target = "kasli"; variant = "tester"; }
@@ -10,7 +12,7 @@ let
   ];
   boardPackages = pkgs.lib.lists.foldr (board: start:
     let
-      boardBinaries = import ./artiq-board.nix { inherit pkgs; } {
+      boardBinaries = import ./artiq-board.nix { inherit pkgs rustPlatform; } {
         target = board.target;
         variant = board.variant;
       };
@@ -20,22 +22,24 @@ let
       }) {} boards;
 
   mainPackages = rec {
-    inherit (pythonDeps) sipyco asyncserial pythonparser pyqtgraph-qt5 artiq-netboot misoc migen microscope jesd204b migen-axi lit outputcheck qasync;
+    inherit (pythonDeps) sipyco asyncserial pythonparser artiq-netboot misoc migen microscope jesd204b migen-axi lit outputcheck qasync;
     binutils-or1k = callPackage ./pkgs/binutils.nix { platform = "or1k"; target = "or1k-linux"; };
     binutils-arm = callPackage ./pkgs/binutils.nix { platform = "arm"; target = "armv7-unknown-linux-gnueabihf"; };
     llvm-or1k = callPackage ./pkgs/llvm-or1k.nix {};
-    rustc = callPackage ./pkgs/rust/rustc-with-crates.nix
+    rustc-legacy = callPackage ./pkgs/rust-legacy/rustc-with-crates.nix
       ((lib.optionalAttrs (stdenv.cc.isGNU && stdenv.hostPlatform.isi686) {
          stdenv = overrideCC stdenv gcc6; # with gcc-7: undefined reference to `__divmoddi4'
        }) //
        { inherit llvm-or1k; });
-    cargo = callPackage ./pkgs/rust/cargo.nix { inherit rustc; rustPlatform = rustPackages_1_45.rustPlatform; };
+    rustc = if artiq7 then rustPlatform.rust.rustc else rustc-legacy;
-    cargo-vendor = callPackage ./pkgs/rust/cargo-vendor.nix {};
+    cargo-legacy = callPackage ./pkgs/rust-legacy/cargo.nix { inherit rustc; rustPlatform = rustPackages_1_45.rustPlatform; };
+    cargo-vendor-legacy = callPackage ./pkgs/rust-legacy/cargo-vendor.nix {};
     llvmlite-artiq = callPackage ./pkgs/llvmlite-artiq.nix { inherit llvm-or1k; };
+    llvmlite-llvm11 = callPackage ./pkgs/llvmlite-llvm11.nix { };
     libartiq-support = callPackage ./pkgs/libartiq-support.nix { inherit rustc; };
-    artiq = callPackage ./pkgs/artiq.nix { inherit pythonDeps binutils-or1k binutils-arm llvm-or1k llvmlite-artiq libartiq-support lit outputcheck; };
+    artiq = callPackage ./pkgs/artiq.nix { inherit pythonDeps binutils-or1k binutils-arm llvm-or1k llvmlite-artiq llvmlite-llvm11 libartiq-support lit outputcheck; };
     artiq-env = (pkgs.python3.withPackages(ps: [ artiq ])).overrideAttrs (oldAttrs: { name = "${pkgs.python3.name}-artiq-env-${artiq.version}"; });
-    openocd = callPackage ./pkgs/openocd.nix { autoreconfHook = pkgs.autoreconfHook269 or pkgs.autoreconfHook; };
+    openocd = callPackage ./pkgs/openocd.nix { };
   };
 
   condaNoarch = {
@@ -45,7 +49,6 @@ let
       src = import ./conda/fake-source.nix { inherit pkgs; } {
         name = "pythonparser";
         inherit (pythonDeps.pythonparser) version src;
-        extraSrcCommands = "patch -p1 < ${./pkgs/pythonparserver.patch}";
         dependencies = ["regex"];
       };
     };
@@ -76,7 +79,7 @@ let
     };
     conda-bscan-spi-bitstreams = import ./conda/bscan-spi-bitstreams.nix {
       inherit pkgs;
-      inherit (mainPackages.openocd) bscan_spi_bitstreams;
+      bscan_spi_bitstreams = "${mainPackages.openocd}/share/bscan-spi-bitstreams";
     };
     conda-artiq = import ./conda/artiq.nix { inherit pkgs; };
     conda-asyncserial = import ./conda/build.nix { inherit pkgs; } {
@@ -90,7 +93,13 @@ let
     };
   };
 
-  condaLinux = rec {
+  condaLinux = if artiq7 then ({
+    # ARTIQ-7 uses upstream conda-forge packages except llvmlite
+    conda-llvmlite = import ./conda/llvmlite-patched.nix {
+      inherit pkgs;
+      inherit (mainPackages.llvmlite-llvm11) src;
+    };
+  }) else (rec {
     conda-binutils-or1k = import ./conda/binutils.nix {
       inherit pkgs;
       inherit (mainPackages.binutils-or1k) version src;
@@ -110,9 +119,9 @@ let
       inherit pkgs conda-llvm-or1k;
       inherit (mainPackages.llvmlite-artiq) version src;
     };
-  };
+  });
 
-  condaWindowsLegacy = {
+  condaWindows5 = {
     conda-windows-binutils-or1k = import ./conda-windows/redistribute.nix {
       inherit pkgs;
       name = "binutils-or1k";
@@ -136,7 +145,7 @@ let
     };
   };
 
-  condaWindowsExperimental = rec {
+  condaWindows6 = rec {
     conda-windows-binutils-or1k = import ./conda-windows/binutils.nix {
       inherit pkgs;
       inherit (mainPackages.binutils-or1k) version src;
@@ -158,6 +167,6 @@ let
     };
   };
 
-  condaWindows = if artiq6 then condaWindowsExperimental else condaWindowsLegacy;
+  condaWindows = if artiq6 then (if artiq7 then {} else condaWindows6) else condaWindows5;
 in
   boardPackages // mainPackages // condaNoarch // condaLinux // condaWindows

artiq-fast/mozilla-overlay.nix

@@ -0,0 +1,10 @@
+let
+  pkgs = import <nixpkgs> {};
+  overlay = pkgs.fetchFromGitHub {
+    owner = "mozilla";
+    repo = "nixpkgs-mozilla";
+    rev = "0510159186dd2ef46e5464484fbdf119393afa58";
+    sha256 = "sha256-HJX4Pc5ZUAg4apxB/XHuJ+6ukzvRQqeZMjscOBst2bA=";
+  };
+in
+  import overlay

artiq-fast/pkgs/artiq.nix

@@ -1,4 +1,6 @@
-{ stdenv, lib, pythonDeps, fetchgit, git, python3Packages, qt5, binutils-or1k, binutils-arm, llvm-or1k, llvmlite-artiq, libartiq-support, lit, outputcheck, fontconfig }:
+{ stdenv, lib, pythonDeps, fetchgit, git, python3Packages, qt5, libartiq-support, lit, outputcheck, fontconfig,
+  binutils-or1k, binutils-arm, llvm-or1k, llvmlite-artiq,
+  llvm_11, lld_11, llvmlite-llvm11 }:
 
 python3Packages.buildPythonPackage rec {
   pname = "artiq";
@@ -8,10 +10,12 @@ python3Packages.buildPythonPackage rec {
   preBuild = "export VERSIONEER_OVERRIDE=${version}";
 
   nativeBuildInputs = [ qt5.wrapQtAppsHook ];
-  propagatedBuildInputs = [ binutils-or1k llvm-or1k llvmlite-artiq ]
+  propagatedBuildInputs = [ ]
-    ++ (lib.lists.optionals (lib.strings.versionAtLeast version "6.0") [ binutils-arm ])
+    ++ (lib.lists.optionals (!lib.strings.versionAtLeast version "7.0") [ binutils-or1k llvm-or1k llvmlite-artiq ])
-    ++ (with pythonDeps; [ sipyco pyqtgraph-qt5 pythonparser ])
+    ++ (lib.lists.optionals (lib.strings.versionAtLeast version "7.0") [ llvm_11 lld_11 llvmlite-llvm11 ])
-    ++ (with python3Packages; [ pygit2 numpy dateutil scipy prettytable pyserial python-Levenshtein h5py pyqt5 ])
+    ++ (lib.lists.optionals (lib.strings.versionAtLeast version "6.0" && !lib.strings.versionAtLeast version "7.0") [ binutils-arm ])
+    ++ (with pythonDeps; [ sipyco pythonparser ])
+    ++ (with python3Packages; [ pygit2 numpy dateutil scipy prettytable pyserial python-Levenshtein h5py pyqt5 pyqtgraph ])
     ++ [(if (lib.strings.versionAtLeast version "6.0") then pythonDeps.qasync else python3Packages.quamash)];
 
   dontWrapQtApps = true;
@@ -28,14 +32,14 @@ python3Packages.buildPythonPackage rec {
     "--set FONTCONFIG_FILE ${fontconfig.out}/etc/fonts/fonts.conf"
   ];
 
-  checkInputs = [ binutils-or1k outputcheck ];
+  checkInputs = [ lit outputcheck ] ++ (if (lib.strings.versionAtLeast version "7.0") then [ lld_11 llvm_11 ] else [ binutils-or1k ]);
   checkPhase =
   ''
   python -m unittest discover -v artiq.test
 
   TESTDIR=`mktemp -d`
-  cp --no-preserve=mode,ownership -R ${src}/artiq/test/lit $TESTDIR
+  cp --no-preserve=mode,ownership -R $src/artiq/test/lit $TESTDIR
-  LIBARTIQ_SUPPORT=${libartiq-support}/libartiq_support.so ${lit}/bin/lit -v $TESTDIR/lit
+  LIBARTIQ_SUPPORT=${libartiq-support}/libartiq_support.so lit -v $TESTDIR/lit
   '';
 
 

artiq-fast/pkgs/libartiq-support.nix

@@ -10,6 +10,6 @@ stdenv.mkDerivation rec {
   buildPhase =
   ''
   mkdir $out
-  rustc ${src}/artiq/test/libartiq_support/lib.rs --out-dir $out -Cpanic=unwind -g
+  rustc $src/artiq/test/libartiq_support/lib.rs --out-dir $out -Cpanic=unwind -g
   '';
 }

artiq-fast/pkgs/llvmlite-abiname.diff

@@ -0,0 +1,62 @@
+diff --git a/ffi/targets.cpp b/ffi/targets.cpp
+index 98de259fc..1ce472c20 100644
+--- a/ffi/targets.cpp
++++ b/ffi/targets.cpp
+@@ -182,7 +182,8 @@ LLVMPY_CreateTargetMachine(LLVMTargetRef T,
+                            const char *RelocModel,
+                            const char *CodeModel,
+                            int         PrintMC,
+-                           int         JIT)
++                           int         JIT,
++                           const char *ABIName)
+ {
+     using namespace llvm;
+     CodeGenOpt::Level cgol;
+@@ -233,6 +234,7 @@ LLVMPY_CreateTargetMachine(LLVMTargetRef T,
+ 
+     TargetOptions opt;
+     opt.PrintMachineCode = PrintMC;
++    opt.MCOptions.ABIName = ABIName;
+ 
+     bool jit = JIT;
+ 
+diff --git a/llvmlite/binding/targets.py b/llvmlite/binding/targets.py
+index eb53f09f2..a7e6ffdc3 100644
+--- a/llvmlite/binding/targets.py
++++ b/llvmlite/binding/targets.py
+@@ -218,7 +218,7 @@ def __str__(self):
+ 
+     def create_target_machine(self, cpu='', features='',
+                               opt=2, reloc='default', codemodel='jitdefault',
+-                              printmc=False, jit=False):
++                              printmc=False, jit=False, abiname=''):
+         """
+         Create a new TargetMachine for this target and the given options.
+ 
+@@ -230,6 +230,9 @@ def create_target_machine(self, cpu='', features='',
+ 
+         The `jit` option should be set when the target-machine is to be used
+         in a JIT engine.
++
++        The `abiname` option specifies the ABI. RISC-V targets with hard-float
++        needs to pass the ABI name to LLVM.
+         """
+         assert 0 <= opt <= 3
+         assert reloc in RELOC
+@@ -249,6 +252,7 @@ def create_target_machine(self, cpu='', features='',
+                                                 _encode_string(codemodel),
+                                                 int(printmc),
+                                                 int(jit),
++                                                _encode_string(abiname),
+                                                 )
+         if tm:
+             return TargetMachine(tm)
+@@ -403,6 +407,8 @@ def has_svml():
+     c_int,
+     # JIT
+     c_int,
++    # ABIName
++    c_char_p,
+ ]
+ ffi.lib.LLVMPY_CreateTargetMachine.restype = ffi.LLVMTargetMachineRef
+ 

artiq-fast/pkgs/llvmlite-callsite.diff

@@ -0,0 +1,185 @@
+diff --git a/llvmlite/ir/builder.py b/llvmlite/ir/builder.py
+index f18a8d8bd..b4958770e 100644
+--- a/llvmlite/ir/builder.py
++++ b/llvmlite/ir/builder.py
+@@ -872,14 +872,14 @@ def resume(self, landingpad):
+     # Call APIs
+ 
+     def call(self, fn, args, name='', cconv=None, tail=False, fastmath=(),
+-             attrs=()):
++             attrs=(), arg_attrs=None):
+         """
+         Call function *fn* with *args*:
+             name = fn(args...)
+         """
+         inst = instructions.CallInstr(self.block, fn, args, name=name,
+                                       cconv=cconv, tail=tail, fastmath=fastmath,
+-                                      attrs=attrs)
++                                      attrs=attrs, arg_attrs=arg_attrs)
+         self._insert(inst)
+         return inst
+ 
+@@ -908,9 +908,11 @@ def store_reg(self, value, reg_type, reg_name, name=''):
+         return self.asm(ftype, "", "{%s}" % reg_name, [value], True, name)
+ 
+     def invoke(self, fn, args, normal_to, unwind_to,
+-               name='', cconv=None, tail=False):
++               name='', cconv=None, fastmath=(), attrs=(), arg_attrs=None):
+         inst = instructions.InvokeInstr(self.block, fn, args, normal_to,
+-                                        unwind_to, name=name, cconv=cconv)
++                                        unwind_to, name=name, cconv=cconv,
++                                        fastmath=fastmath, attrs=attrs,
++                                        arg_attrs=arg_attrs)
+         self._set_terminator(inst)
+         return inst
+ 
+diff --git a/llvmlite/ir/instructions.py b/llvmlite/ir/instructions.py
+index 7e82ee032..f337c1586 100644
+--- a/llvmlite/ir/instructions.py
++++ b/llvmlite/ir/instructions.py
+@@ -5,7 +5,7 @@
+ from llvmlite.ir import types
+ from llvmlite.ir.values import (Block, Function, Value, NamedValue, Constant,
+                                 MetaDataArgument, MetaDataString, AttributeSet,
+-                                Undefined)
++                                Undefined, ArgumentAttributes)
+ from llvmlite.ir._utils import _HasMetadata
+ 
+ 
+@@ -63,13 +63,20 @@ class FastMathFlags(AttributeSet):
+ 
+ class CallInstr(Instruction):
+     def __init__(self, parent, func, args, name='', cconv=None, tail=False,
+-                 fastmath=(), attrs=()):
++                 fastmath=(), attrs=(), arg_attrs=None):
+         self.cconv = (func.calling_convention
+                       if cconv is None and isinstance(func, Function)
+                       else cconv)
+         self.tail = tail
+         self.fastmath = FastMathFlags(fastmath)
+         self.attributes = CallInstrAttributes(attrs)
++        self.arg_attributes = {}
++        if arg_attrs:
++            for idx, attrs in arg_attrs.items():
++                if not (0 <= idx < len(args)):
++                    raise ValueError("Invalid argument index {}"
++                                     .format(idx))
++                self.arg_attributes[idx] = ArgumentAttributes(attrs)
+ 
+         # Fix and validate arguments
+         args = list(args)
+@@ -111,8 +118,13 @@ def called_function(self):
+         return self.callee
+ 
+     def _descr(self, buf, add_metadata):
+-        args = ', '.join(['{0} {1}'.format(a.type, a.get_reference())
+-                          for a in self.args])
++        def descr_arg(i, a):
++            if i in self.arg_attributes:
++                attrs = ' '.join(self.arg_attributes[i]._to_list()) + ' '
++            else:
++                attrs = ''
++            return '{0} {1}{2}'.format(a.type, attrs, a.get_reference())
++        args = ', '.join([descr_arg(i, a) for i, a in enumerate(self.args)])
+ 
+         fnty = self.callee.function_type
+         # Only print function type if variable-argument
+@@ -142,10 +154,12 @@ def descr(self, buf):
+ 
+ class InvokeInstr(CallInstr):
+     def __init__(self, parent, func, args, normal_to, unwind_to, name='',
+-                 cconv=None):
++                 cconv=None, fastmath=(), attrs=(), arg_attrs=None):
+         assert isinstance(normal_to, Block)
+         assert isinstance(unwind_to, Block)
+-        super(InvokeInstr, self).__init__(parent, func, args, name, cconv)
++        super(InvokeInstr, self).__init__(parent, func, args, name, cconv,
++                                          tail=False, fastmath=fastmath,
++                                          attrs=attrs, arg_attrs=arg_attrs)
+         self.opname = "invoke"
+         self.normal_to = normal_to
+         self.unwind_to = unwind_to
+diff --git a/llvmlite/tests/test_ir.py b/llvmlite/tests/test_ir.py
+index e97e528ac..ab5864719 100644
+--- a/llvmlite/tests/test_ir.py
++++ b/llvmlite/tests/test_ir.py
+@@ -1181,6 +1181,39 @@ def test_call_metadata(self):
+                 call void @"llvm.dbg.declare"(metadata i32* %"a", metadata !0, metadata !0)
+             """)  # noqa E501
+ 
++    def test_call_attributes(self):
++        block = self.block(name='my_block')
++        builder = ir.IRBuilder(block)
++        fun_ty = ir.FunctionType(
++            ir.VoidType(), (int32.as_pointer(), int32, int32.as_pointer()))
++        fun = ir.Function(builder.function.module, fun_ty, 'fun')
++        fun.args[0].add_attribute('sret')
++        retval = builder.alloca(int32, name='retval')
++        other = builder.alloca(int32, name='other')
++        builder.call(
++            fun,
++            (retval, ir.Constant(int32, 42), other),
++            arg_attrs={
++                0: ('sret', 'noalias'),
++                2: 'noalias'
++            }
++        )
++        self.check_block(block, """\
++        my_block:
++            %"retval" = alloca i32
++            %"other" = alloca i32
++            call void @"fun"(i32* noalias sret %"retval", i32 42, i32* noalias %"other")
++        """)  # noqa E501
++
++    def test_invalid_call_attributes(self):
++        block = self.block()
++        builder = ir.IRBuilder(block)
++        fun_ty = ir.FunctionType(ir.VoidType(), ())
++        fun = ir.Function(builder.function.module, fun_ty, 'fun')
++        with self.assertRaises(ValueError):
++            # The function has no arguments, so this should fail.
++            builder.call(fun, (), arg_attrs={0: 'sret'})
++
+     def test_invoke(self):
+         block = self.block(name='my_block')
+         builder = ir.IRBuilder(block)
+@@ -1196,6 +1229,39 @@ def test_invoke(self):
+                     to label %"normal" unwind label %"unwind"
+             """)
+ 
++    def test_invoke_attributes(self):
++        block = self.block(name='my_block')
++        builder = ir.IRBuilder(block)
++        fun_ty = ir.FunctionType(
++            ir.VoidType(), (int32.as_pointer(), int32, int32.as_pointer()))
++        fun = ir.Function(builder.function.module, fun_ty, 'fun')
++        fun.calling_convention = "fastcc"
++        fun.args[0].add_attribute('sret')
++        retval = builder.alloca(int32, name='retval')
++        other = builder.alloca(int32, name='other')
++        bb_normal = builder.function.append_basic_block(name='normal')
++        bb_unwind = builder.function.append_basic_block(name='unwind')
++        builder.invoke(
++            fun,
++            (retval, ir.Constant(int32, 42), other),
++            bb_normal,
++            bb_unwind,
++            cconv='fastcc',
++            fastmath='fast',
++            attrs='noinline',
++            arg_attrs={
++                0: ('sret', 'noalias'),
++                2: 'noalias'
++            }
++        )
++        self.check_block(block, """\
++        my_block:
++            %"retval" = alloca i32
++            %"other" = alloca i32
++            invoke fast fastcc void @"fun"(i32* noalias sret %"retval", i32 42, i32* noalias %"other") noinline
++                to label %"normal" unwind label %"unwind"
++        """)  # noqa E501
++
+     def test_landingpad(self):
+         block = self.block(name='my_block')
+         builder = ir.IRBuilder(block)

artiq-fast/pkgs/llvmlite-llvm11.nix

@@ -0,0 +1,26 @@
+{ python3Packages, llvm_11 }:
+
+python3Packages.buildPythonPackage rec {
+  pname = "llvmlite";
+  version = "0.37.0-artiq";
+  src = python3Packages.fetchPypi {
+      inherit pname;
+      version = "0.37.0";
+      sha256 = "sha256-Y5K4cM0BjsDGRda7uRjWqg7sqMYmdLqu4whi1raGWxU=";
+  };
+  # https://github.com/numba/llvmlite/pull/702
+  # https://github.com/numba/llvmlite/pull/775
+  patches = [ ./llvmlite-callsite.diff ./llvmlite-abiname.diff ];
+  nativeBuildInputs = [ llvm_11 ];
+  # Disable static linking
+  # https://github.com/numba/llvmlite/issues/93
+  postPatch = ''
+      substituteInPlace ffi/Makefile.linux --replace "-static-libstdc++" ""
+      substituteInPlace llvmlite/tests/test_binding.py --replace "test_linux" "nope"
+  '';
+  # Set directory containing llvm-config binary
+   preConfigure = ''
+      export LLVM_CONFIG=${llvm_11.dev}/bin/llvm-config
+  '';
+  doCheck = false;  # FIXME
+}

artiq-fast/pkgs/openocd-jtagspi.diff

@@ -0,0 +1,830 @@
+diff --git a/doc/openocd.texi b/doc/openocd.texi
+index 138922d08..ad9f10d2e 100644
+--- a/doc/openocd.texi
++++ b/doc/openocd.texi
+@@ -5565,6 +5565,10 @@ will not work. These include all @command{*_image} and
+ functionality is available through the @command{flash write_bank},
+ @command{flash read_bank}, and @command{flash verify_bank} commands.
+ 
++According to device size, 1- to 4-byte addresses are sent. However, some
++flash chips additionally have to be switched to 4-byte addresses by an extra
++command, see below.
++
+ @itemize
+ @item @var{ir} ... is loaded into the JTAG IR to map the flash as the JTAG DR.
+ For the bitstreams generated from @file{xilinx_bscan_spi.py} this is the
+@@ -5577,6 +5581,29 @@ set _XILINX_USER1 0x02
+ flash bank $_FLASHNAME spi 0x0 0 0 0 \
+            $_TARGETNAME $_XILINX_USER1
+ @end example
++
++@deffn Command {jtagspi set} bank_id name total_size page_size read_cmd unused pprg_cmd mass_erase_cmd sector_size sector_erase_cmd
++Sets flash parameters: @var{name} human readable string, @var{total_size}
++size in bytes, @var{page_size} is write page size. @var{read_cmd} and @var{pprg_cmd}
++are commands for read and page program, respectively. @var{mass_erase_cmd},
++@var{sector_size} and @var{sector_erase_cmd} are optional.
++@example
++jtagspi set 0 w25q128 0x1000000 0x100 0x03 0 0x02 0xC7 0x10000 0xD8
++@end example
++@end deffn
++
++@deffn Command {jtagspi cmd} bank_id resp_num cmd_byte ...
++Sends command @var{cmd_byte} and at most 20 following bytes and reads
++@var{resp_num} bytes afterwards. E.g. for 'Enter 4-byte address mode'
++@example
++jtagspi cmd 0 0 0xB7
++@end example
++@end deffn
++
++@deffn Command {jtagspi always_4byte} bank_id [ on | off ]
++Some devices use 4-byte addresses for all commands except the legacy 0x03 read
++regardless of device size. This command controls the corresponding hack.
++@end deffn
+ @end deffn
+ 
+ @deffn {Flash Driver} {xcf}
+diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c
+index dc49fda61..e9a643d12 100644
+--- a/src/flash/nor/jtagspi.c
++++ b/src/flash/nor/jtagspi.c
+@@ -29,9 +29,12 @@
+ 
+ struct jtagspi_flash_bank {
+ 	struct jtag_tap *tap;
+-	const struct flash_device *dev;
++	struct flash_device dev;
++	char devname[32];
+ 	bool probed;
++	bool always_4byte;			/* use always 4-byte address except for basic read 0x03 */
+ 	uint32_t ir;
++	unsigned int addr_len;		/* address length in bytes */
+ };
+ 
+ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
+@@ -42,10 +45,11 @@ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
+ 		return ERROR_COMMAND_SYNTAX_ERROR;
+ 
+ 	info = malloc(sizeof(struct jtagspi_flash_bank));
+-	if (!info) {
++	if (info == NULL) {
+ 		LOG_ERROR("no memory for flash bank info");
+ 		return ERROR_FAIL;
+ 	}
++	bank->sectors = NULL;
+ 	bank->driver_priv = info;
+ 
+ 	info->tap = NULL;
+@@ -69,70 +73,59 @@ static void jtagspi_set_ir(struct flash_bank *bank)
+ 	jtag_add_ir_scan(info->tap, &field, TAP_IDLE);
+ }
+ 
+-static void flip_u8(uint8_t *in, uint8_t *out, int len)
++static void flip_u8(const uint8_t *in, uint8_t *out, unsigned int len)
+ {
+-	for (int i = 0; i < len; i++)
++	for (unsigned int i = 0; i < len; i++)
+ 		out[i] = flip_u32(in[i], 8);
+ }
+ 
+ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
+-		uint32_t *addr, uint8_t *data, int len)
++		uint8_t *write_buffer, unsigned int write_len, uint8_t *data_buffer, int data_len)
+ {
+-	struct jtagspi_flash_bank *info = bank->driver_priv;
++	assert(write_buffer || write_len == 0);
++	assert(data_buffer || data_len == 0);
++
+ 	struct scan_field fields[6];
+-	uint8_t marker = 1;
+-	uint8_t xfer_bits_buf[4];
+-	uint8_t addr_buf[3];
+-	uint8_t *data_buf;
+-	uint32_t xfer_bits;
+-	int is_read, lenb, n;
+ 
+-	/* LOG_DEBUG("cmd=0x%02x len=%i", cmd, len); */
++	LOG_DEBUG("cmd=0x%02x write_len=%d data_len=%d", cmd, write_len, data_len);
+ 
+-	is_read = (len < 0);
++	/* negative data_len == read operation */
++	const bool is_read = (data_len < 0);
+ 	if (is_read)
+-		len = -len;
+-
+-	n = 0;
++		data_len = -data_len;
+ 
++	int n = 0;
++	const uint8_t marker = 1;
+ 	fields[n].num_bits = 1;
+ 	fields[n].out_value = &marker;
+ 	fields[n].in_value = NULL;
+ 	n++;
+ 
+-	xfer_bits = 8 + len - 1;
+-	/* cmd + read/write - 1 due to the counter implementation */
+-	if (addr)
+-		xfer_bits += 24;
+-	h_u32_to_be(xfer_bits_buf, xfer_bits);
+-	flip_u8(xfer_bits_buf, xfer_bits_buf, 4);
+-	fields[n].num_bits = 32;
+-	fields[n].out_value = xfer_bits_buf;
++	/* transfer length = cmd + address + read/write,
++	 * -1 due to the counter implementation */
++	uint8_t xfer_bits[4];
++	h_u32_to_be(xfer_bits, ((sizeof(cmd) + write_len + data_len) * CHAR_BIT) - 1);
++	flip_u8(xfer_bits, xfer_bits, sizeof(xfer_bits));
++	fields[n].num_bits = sizeof(xfer_bits) * CHAR_BIT;
++	fields[n].out_value = xfer_bits;
+ 	fields[n].in_value = NULL;
+ 	n++;
+ 
+-	cmd = flip_u32(cmd, 8);
+-	fields[n].num_bits = 8;
++	flip_u8(&cmd, &cmd, sizeof(cmd));
++	fields[n].num_bits = sizeof(cmd) * CHAR_BIT;
+ 	fields[n].out_value = &cmd;
+ 	fields[n].in_value = NULL;
+ 	n++;
+ 
+-	if (addr) {
+-		h_u24_to_be(addr_buf, *addr);
+-		flip_u8(addr_buf, addr_buf, 3);
+-		fields[n].num_bits = 24;
+-		fields[n].out_value = addr_buf;
++	if (write_len) {
++		flip_u8(write_buffer, write_buffer, write_len);
++		fields[n].num_bits = write_len * CHAR_BIT;
++		fields[n].out_value = write_buffer;
+ 		fields[n].in_value = NULL;
+ 		n++;
+ 	}
+ 
+-	lenb = DIV_ROUND_UP(len, 8);
+-	data_buf = malloc(lenb);
+-	if (lenb > 0) {
+-		if (!data_buf) {
+-			LOG_ERROR("no memory for spi buffer");
+-			return ERROR_FAIL;
+-		}
++	if (data_len > 0) {
+ 		if (is_read) {
+ 			fields[n].num_bits = jtag_tap_count_enabled();
+ 			fields[n].out_value = NULL;
+@@ -140,78 +133,313 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
+ 			n++;
+ 
+ 			fields[n].out_value = NULL;
+-			fields[n].in_value = data_buf;
++			fields[n].in_value = data_buffer;
+ 		} else {
+-			flip_u8(data, data_buf, lenb);
+-			fields[n].out_value = data_buf;
++			flip_u8(data_buffer, data_buffer, data_len);
++			fields[n].out_value = data_buffer;
+ 			fields[n].in_value = NULL;
+ 		}
+-		fields[n].num_bits = len;
++		fields[n].num_bits = data_len * CHAR_BIT;
+ 		n++;
+ 	}
+ 
+ 	jtagspi_set_ir(bank);
+ 	/* passing from an IR scan to SHIFT-DR clears BYPASS registers */
++	struct jtagspi_flash_bank *info = bank->driver_priv;
+ 	jtag_add_dr_scan(info->tap, n, fields, TAP_IDLE);
+ 	int retval = jtag_execute_queue();
+ 
+ 	if (is_read)
+-		flip_u8(data_buf, data, lenb);
+-	free(data_buf);
++		flip_u8(data_buffer, data_buffer, data_len);
+ 	return retval;
+ }
+ 
++COMMAND_HANDLER(jtagspi_handle_set)
++{
++	struct flash_bank *bank = NULL;
++	struct jtagspi_flash_bank *info = NULL;
++	struct flash_sector *sectors = NULL;
++	uint32_t temp;
++	unsigned int index = 1;
++	int retval;
++
++	LOG_DEBUG("%s", __func__);
++
++	/* there are 6 mandatory arguments:
++	 * devname, size_in_bytes, pagesize, read_cmd, unused, pprog_cmd */
++	if (index + 6 > CMD_ARGC) {
++		command_print(CMD, "jtagspi: not enough arguments");
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
++	if (ERROR_OK != retval)
++		return retval;
++	info = bank->driver_priv;
++
++	/* invalidate all old info */
++	if (info->probed) {
++		bank->size = 0;
++		bank->num_sectors = 0;
++		if (bank->sectors)
++			free(bank->sectors);
++		bank->sectors = NULL;
++		info->always_4byte = false;
++		info->probed = false;
++	}
++	memset(&info->dev, 0, sizeof(info->dev));
++
++	strncpy(info->devname, CMD_ARGV[index++], sizeof(info->devname) - 1);
++	info->devname[sizeof(info->devname) - 1] = '\0';
++
++	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp);
++	info->dev.size_in_bytes = temp;
++	if ((temp & (temp - 1)) || (temp < (1UL << 8))) {
++		command_print(CMD, "jtagspi: device size must be 2^n with n >= 8");
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp);
++	info->dev.pagesize = temp;
++	if (info->dev.pagesize == 0)
++		info->dev.pagesize = SPIFLASH_DEF_PAGESIZE;
++	if ((temp & (temp - 1)) || (temp > info->dev.size_in_bytes)) {
++		command_print(CMD, "jtagspi: page size must be 2^n and <= device size");
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.read_cmd);
++	if ((info->dev.read_cmd != 0x03) &&
++		(info->dev.read_cmd != 0x13)) {
++		command_print(CMD, "jtagspi: only 0x03/0x13 READ allowed");
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.qread_cmd);
++
++	COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.pprog_cmd);
++	if ((info->dev.pprog_cmd != 0x02) &&
++		(info->dev.pprog_cmd != 0x12)) {
++		command_print(CMD, "jtagspi: only 0x02/0x12 PPRG allowed");
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	/* remaining params are optional */
++	if (index < CMD_ARGC)
++		COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.chip_erase_cmd);
++	else
++		info->dev.chip_erase_cmd = 0x00;
++
++	if (index < CMD_ARGC) {
++		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp);
++		info->dev.sectorsize = temp;
++		if ((info->dev.sectorsize > info->dev.size_in_bytes) ||
++			(info->dev.sectorsize < info->dev.pagesize) || (temp & (temp - 1))) {
++			command_print(CMD, "jtagspi: sector size must be 2^n and <= device size");
++			return ERROR_COMMAND_SYNTAX_ERROR;
++		}
++
++		if (index < CMD_ARGC)
++			COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.erase_cmd);
++		else {
++			command_print(CMD, "jtagspi: erase command missing");
++			return ERROR_COMMAND_SYNTAX_ERROR;
++		}
++	} else {
++		/* no sector size / sector erase cmd given, treat whole bank as a single sector */
++		info->dev.erase_cmd = 0x00;
++		info->dev.sectorsize = info->dev.size_in_bytes;
++	}
++
++	if (index < CMD_ARGC) {
++		command_print(CMD, "jtagspi: extra arguments");
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	/* set correct size value */
++	bank->size = info->dev.size_in_bytes;
++
++	/* calculate address length in bytes */
++	if (bank->size <= (1UL << 8))
++		info->addr_len = 1;
++	else if (bank->size <= (1UL << 16))
++		info->addr_len = 2;
++	else if (bank->size <= (1UL << 24))
++		info->addr_len = 3;
++	else {
++		info->addr_len = 4;
++		LOG_WARNING("4-byte addresses needed, might need extra command to enable");
++	}
++
++	/* create and fill sectors array */
++	bank->num_sectors =
++		info->dev.size_in_bytes / info->dev.sectorsize;
++	sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
++	if (sectors == NULL) {
++		LOG_ERROR("Not enough memory");
++		return ERROR_FAIL;
++	}
++
++	for (unsigned int sector = 0; sector < bank->num_sectors; sector++) {
++		sectors[sector].offset = sector * (info->dev.sectorsize);
++		sectors[sector].size = info->dev.sectorsize;
++		sectors[sector].is_erased = -1;
++		sectors[sector].is_protected = 0;
++	}
++
++	bank->sectors = sectors;
++	info->dev.name = info->devname;
++	if (info->dev.size_in_bytes / 4096)
++		LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " kbytes",
++			info->dev.name, info->dev.size_in_bytes / 1024);
++	else
++		LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " bytes",
++			info->dev.name, info->dev.size_in_bytes);
++	info->probed = true;
++
++	return ERROR_OK;
++}
++
++COMMAND_HANDLER(jtagspi_handle_cmd)
++{
++	struct flash_bank *bank;
++	unsigned int index = 1;
++	const int max = 21;
++	uint8_t num_write, num_read, write_buffer[max], read_buffer[1 << CHAR_BIT];
++	uint8_t data, *ptr;
++	char temp[4], output[(2 + max + (1 << CHAR_BIT)) * 3 + 8];
++	int retval;
++
++	LOG_DEBUG("%s", __func__);
++
++	if (CMD_ARGC < 3) {
++		command_print(CMD, "jtagspi: not enough arguments");
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	num_write = CMD_ARGC - 2;
++	if (num_write > max) {
++		LOG_ERROR("at most %d bytes may be send", max);
++		return ERROR_COMMAND_SYNTAX_ERROR;
++	}
++
++	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
++	if (ERROR_OK != retval)
++		return retval;
++
++	COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], num_read);
++
++	snprintf(output, sizeof(output), "spi: ");
++	for (ptr = &write_buffer[0] ; index < CMD_ARGC; index++) {
++		COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index], data);
++		*ptr++ = data;
++		snprintf(temp, sizeof(temp), "%02" PRIx8 " ", data);
++		strncat(output, temp, sizeof(output) - strlen(output) - 1);
++	}
++	strncat(output, "-> ", sizeof(output) - strlen(output) - 1);
++
++	/* process command */
++	ptr = &read_buffer[0];
++	jtagspi_cmd(bank, write_buffer[0], &write_buffer[1], num_write - 1, ptr, -num_read);
++	if (retval != ERROR_OK)
++		return retval;
++
++	for ( ; num_read > 0; num_read--) {
++		snprintf(temp, sizeof(temp), "%02" PRIx8 " ", *ptr++);
++		strncat(output, temp, sizeof(output) - strlen(output) - 1);
++	}
++	command_print(CMD, "%s", output);
++
++	return ERROR_OK;
++}
++
++COMMAND_HANDLER(jtagspi_handle_always_4byte)
++{
++	struct flash_bank *bank;
++	struct jtagspi_flash_bank *jtagspi_info;
++	int retval;
++
++	LOG_DEBUG("%s", __func__);
++
++	if ((CMD_ARGC != 1) && (CMD_ARGC != 2))
++		return ERROR_COMMAND_SYNTAX_ERROR;
++
++	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
++	if (ERROR_OK != retval)
++		return retval;
++
++	jtagspi_info = bank->driver_priv;
++
++	if (CMD_ARGC == 1)
++		command_print(CMD, jtagspi_info->always_4byte ? "on" : "off");
++	else
++		COMMAND_PARSE_BOOL(CMD_ARGV[1], jtagspi_info->always_4byte, "on", "off");
++
++	return ERROR_OK;
++}
++
+ static int jtagspi_probe(struct flash_bank *bank)
+ {
+ 	struct jtagspi_flash_bank *info = bank->driver_priv;
+ 	struct flash_sector *sectors;
++	const struct flash_device *p;
+ 	uint8_t in_buf[3];
+ 	uint32_t id, sectorsize;
+ 
+-	if (info->probed)
++	if (bank->sectors) {
+ 		free(bank->sectors);
++		bank->sectors = NULL;
++	}
+ 	info->probed = false;
+ 
+-	if (!bank->target->tap) {
++	if (bank->target->tap == NULL) {
+ 		LOG_ERROR("Target has no JTAG tap");
+ 		return ERROR_FAIL;
+ 	}
+ 	info->tap = bank->target->tap;
+ 
+-	jtagspi_cmd(bank, SPIFLASH_READ_ID, NULL, in_buf, -24);
++	jtagspi_cmd(bank, SPIFLASH_READ_ID, NULL, 0, in_buf, -3);
+ 	/* the table in spi.c has the manufacturer byte (first) as the lsb */
+ 	id = le_to_h_u24(in_buf);
+ 
+-	info->dev = NULL;
+-	for (const struct flash_device *p = flash_devices; p->name ; p++)
++	memset(&info->dev, 0, sizeof(info->dev));
++	for (p = flash_devices; p->name ; p++)
+ 		if (p->device_id == id) {
+-			info->dev = p;
++			memcpy(&info->dev, p, sizeof(info->dev));
+ 			break;
+ 		}
+ 
+-	if (!(info->dev)) {
+-		LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
++	if (!(p->name)) {
++		LOG_ERROR("Unknown flash device (ID 0x%06" PRIx32 ")", id & 0xFFFFFF);
+ 		return ERROR_FAIL;
+ 	}
+ 
+-	LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")",
+-		info->dev->name, info->dev->device_id);
++	LOG_INFO("Found flash device \'%s\' (ID 0x%06" PRIx32 ")",
++		info->dev.name, info->dev.device_id & 0xFFFFFF);
+ 
+ 	/* Set correct size value */
+-	bank->size = info->dev->size_in_bytes;
+-	if (bank->size <= (1UL << 16))
+-		LOG_WARNING("device needs 2-byte addresses - not implemented");
+-	if (bank->size > (1UL << 24))
+-		LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
++	bank->size = info->dev.size_in_bytes;
++
++	/* calculate address length in bytes */
++	if (bank->size <= (1UL << 8))
++		info->addr_len = 1;
++	else if (bank->size <= (1UL << 16))
++		info->addr_len = 2;
++	else if (bank->size <= (1UL << 24))
++		info->addr_len = 3;
++	else {
++		info->addr_len = 4;
++		LOG_WARNING("4-byte addresses needed, might need extra command to enable");
++	}
+ 
+ 	/* if no sectors, treat whole bank as single sector */
+-	sectorsize = info->dev->sectorsize ?
+-		info->dev->sectorsize : info->dev->size_in_bytes;
++	sectorsize = info->dev.sectorsize ?
++		info->dev.sectorsize : info->dev.size_in_bytes;
+ 
+ 	/* create and fill sectors array */
+-	bank->num_sectors = info->dev->size_in_bytes / sectorsize;
++	bank->num_sectors = info->dev.size_in_bytes / sectorsize;
+ 	sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
+-	if (!sectors) {
++	if (sectors == NULL) {
+ 		LOG_ERROR("not enough memory");
+ 		return ERROR_FAIL;
+ 	}
+@@ -228,27 +456,35 @@ static int jtagspi_probe(struct flash_bank *bank)
+ 	return ERROR_OK;
+ }
+ 
++static int jtagspi_auto_probe(struct flash_bank *bank)
++{
++	struct jtagspi_flash_bank *info = bank->driver_priv;
++
++	if (info->probed)
++		return ERROR_OK;
++	return jtagspi_probe(bank);
++}
++
+ static int jtagspi_read_status(struct flash_bank *bank, uint32_t *status)
+ {
+ 	uint8_t buf;
+-	int err = jtagspi_cmd(bank, SPIFLASH_READ_STATUS, NULL, &buf, -8);
++	int err = jtagspi_cmd(bank, SPIFLASH_READ_STATUS, NULL, 0, &buf, -1);
+ 	if (err == ERROR_OK) {
+ 		*status = buf;
+-		/* LOG_DEBUG("status=0x%08" PRIx32, *status); */
++		LOG_DEBUG("status=0x%02" PRIx8, *status);
+ 	}
+-
+ 	return err;
+ }
+ 
+ static int jtagspi_wait(struct flash_bank *bank, int timeout_ms)
+ {
+-	uint32_t status;
+ 	int64_t t0 = timeval_ms();
+ 	int64_t dt;
+ 
+ 	do {
+ 		dt = timeval_ms() - t0;
+ 
++		uint32_t status = (uint32_t)-1;
+ 		int retval = jtagspi_read_status(bank, &status);
+ 		if (retval != ERROR_OK)
+ 			return retval;
+@@ -266,16 +502,15 @@ static int jtagspi_wait(struct flash_bank *bank, int timeout_ms)
+ 
+ static int jtagspi_write_enable(struct flash_bank *bank)
+ {
+-	uint32_t status;
+-
+-	jtagspi_cmd(bank, SPIFLASH_WRITE_ENABLE, NULL, NULL, 0);
++	jtagspi_cmd(bank, SPIFLASH_WRITE_ENABLE, NULL, 0, NULL, 0);
+ 
++	uint32_t status = (uint32_t)-1;
+ 	int retval = jtagspi_read_status(bank, &status);
+ 	if (retval != ERROR_OK)
+ 		return retval;
+ 
+ 	if ((status & SPIFLASH_WE_BIT) == 0) {
+-		LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status);
++		LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status);
+ 		return ERROR_FAIL;
+ 	}
+ 	return ERROR_OK;
+@@ -287,28 +522,51 @@ static int jtagspi_bulk_erase(struct flash_bank *bank)
+ 	int retval;
+ 	int64_t t0 = timeval_ms();
+ 
+-	if (info->dev->chip_erase_cmd == 0x00)
++	if (info->dev.chip_erase_cmd == 0x00)
+ 		return ERROR_FLASH_OPER_UNSUPPORTED;
+ 
+ 	retval = jtagspi_write_enable(bank);
+ 	if (retval != ERROR_OK)
+ 		return retval;
+-	jtagspi_cmd(bank, info->dev->chip_erase_cmd, NULL, NULL, 0);
+-	retval = jtagspi_wait(bank, bank->num_sectors*JTAGSPI_MAX_TIMEOUT);
++
++	jtagspi_cmd(bank, info->dev.chip_erase_cmd, NULL, 0, NULL, 0);
++	if (retval != ERROR_OK)
++		return retval;
++
++	retval = jtagspi_wait(bank, bank->num_sectors * JTAGSPI_MAX_TIMEOUT);
+ 	LOG_INFO("took %" PRId64 " ms", timeval_ms() - t0);
+ 	return retval;
+ }
+ 
++static uint8_t *fill_addr(uint32_t addr, unsigned int addr_len, uint8_t *buffer)
++{
++	for (buffer += addr_len; addr_len > 0; --addr_len) {
++		*--buffer = addr;
++		addr >>= 8;
++	}
++
++	return buffer;
++}
++
+ static int jtagspi_sector_erase(struct flash_bank *bank, unsigned int sector)
+ {
+ 	struct jtagspi_flash_bank *info = bank->driver_priv;
+ 	int retval;
++	uint8_t addr[sizeof(uint32_t)];
+ 	int64_t t0 = timeval_ms();
+ 
+ 	retval = jtagspi_write_enable(bank);
+ 	if (retval != ERROR_OK)
+ 		return retval;
+-	jtagspi_cmd(bank, info->dev->erase_cmd, &bank->sectors[sector].offset, NULL, 0);
++
++	/* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */
++	unsigned int addr_len = info->always_4byte ? 4 : info->addr_len;
++
++	retval = jtagspi_cmd(bank, info->dev.erase_cmd, fill_addr(bank->sectors[sector].offset, addr_len, addr),
++			addr_len, NULL, 0);
++	if (retval != ERROR_OK)
++		return retval;
++
+ 	retval = jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT);
+ 	LOG_INFO("sector %u took %" PRId64 " ms", sector, timeval_ms() - t0);
+ 	return retval;
+@@ -339,8 +597,9 @@ static int jtagspi_erase(struct flash_bank *bank, unsigned int first,
+ 		}
+ 	}
+ 
+-	if (first == 0 && last == (bank->num_sectors - 1)
+-		&& info->dev->chip_erase_cmd != info->dev->erase_cmd) {
++	if (first == 0 && last == (bank->num_sectors - 1) &&
++		info->dev.chip_erase_cmd != 0x00 &&
++		info->dev.chip_erase_cmd != info->dev.erase_cmd) {
+ 		LOG_DEBUG("Trying bulk erase.");
+ 		retval = jtagspi_bulk_erase(bank);
+ 		if (retval == ERROR_OK)
+@@ -349,7 +608,7 @@ static int jtagspi_erase(struct flash_bank *bank, unsigned int first,
+ 			LOG_WARNING("Bulk flash erase failed. Falling back to sector erase.");
+ 	}
+ 
+-	if (info->dev->erase_cmd == 0x00)
++	if (info->dev.erase_cmd == 0x00)
+ 		return ERROR_FLASH_OPER_UNSUPPORTED;
+ 
+ 	for (unsigned int sector = first; sector <= last; sector++) {
+@@ -374,49 +633,93 @@ static int jtagspi_protect(struct flash_bank *bank, int set, unsigned int first,
+ static int jtagspi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+ {
+ 	struct jtagspi_flash_bank *info = bank->driver_priv;
++	uint32_t pagesize, currsize;
++	uint8_t addr[sizeof(uint32_t)];
++	int retval;
+ 
+ 	if (!(info->probed)) {
+-		LOG_ERROR("Flash bank not yet probed.");
++		LOG_ERROR("Flash bank not probed.");
+ 		return ERROR_FLASH_BANK_NOT_PROBED;
+ 	}
+ 
+-	jtagspi_cmd(bank, SPIFLASH_READ, &offset, buffer, -count*8);
++	/* if no sectorsize, use reasonable default */
++	pagesize = info->dev.sectorsize ? info->dev.sectorsize : info->dev.pagesize;
++	if (pagesize == 0)
++		pagesize = (info->dev.size_in_bytes <= SPIFLASH_DEF_PAGESIZE) ?
++			info->dev.size_in_bytes : SPIFLASH_DEF_PAGESIZE;
++
++	/* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */
++	unsigned int addr_len = ((info->dev.read_cmd != 0x03) && info->always_4byte) ? 4 : info->addr_len;
++
++	while (count > 0) {
++		/* length up to end of current page */
++		currsize = ((offset + pagesize) & ~(pagesize - 1)) - offset;
++		/* but no more than remaining size */
++		currsize = (count < currsize) ? count : currsize;
++
++		retval = jtagspi_cmd(bank, info->dev.read_cmd, fill_addr(offset, addr_len, addr),
++			addr_len, buffer, -currsize);
++		if (retval != ERROR_OK) {
++			LOG_ERROR("page read error");
++			return retval;
++		}
++		LOG_DEBUG("read page at 0x%08" PRIx32, offset);
++		offset += currsize;
++		buffer += currsize;
++		count -= currsize;
++	}
+ 	return ERROR_OK;
+ }
+ 
+ static int jtagspi_page_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
+ {
++	struct jtagspi_flash_bank *info = bank->driver_priv;
++	uint8_t addr[sizeof(uint32_t)];
+ 	int retval;
+ 
+ 	retval = jtagspi_write_enable(bank);
+ 	if (retval != ERROR_OK)
+ 		return retval;
+-	jtagspi_cmd(bank, SPIFLASH_PAGE_PROGRAM, &offset, (uint8_t *) buffer, count*8);
++
++	/* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */
++	unsigned int addr_len = ((info->dev.read_cmd != 0x03) && info->always_4byte) ? 4 : info->addr_len;
++
++	retval = jtagspi_cmd(bank, info->dev.pprog_cmd, fill_addr(offset, addr_len, addr),
++		addr_len, (uint8_t *) buffer, count);
++	if (retval != ERROR_OK)
++		return retval;
+ 	return jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT);
+ }
+ 
+ static int jtagspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
+ {
+ 	struct jtagspi_flash_bank *info = bank->driver_priv;
++	uint32_t pagesize, currsize;
+ 	int retval;
+-	uint32_t n, pagesize;
+ 
+ 	if (!(info->probed)) {
+-		LOG_ERROR("Flash bank not yet probed.");
++		LOG_ERROR("Flash bank not probed.");
+ 		return ERROR_FLASH_BANK_NOT_PROBED;
+ 	}
+ 
+ 	/* if no write pagesize, use reasonable default */
+-	pagesize = info->dev->pagesize ? info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
++	pagesize = info->dev.pagesize ? info->dev.pagesize : SPIFLASH_DEF_PAGESIZE;
++
++	while (count > 0) {
++		/* length up to end of current page */
++		currsize = ((offset + pagesize) & ~(pagesize - 1)) - offset;
++		/* but no more than remaining size */
++		currsize = (count < currsize) ? count : currsize;
+ 
+-	for (n = 0; n < count; n += pagesize) {
+-		retval = jtagspi_page_write(bank, buffer + n, offset + n,
+-				MIN(count - n, pagesize));
++		retval = jtagspi_page_write(bank, buffer, offset, currsize);
+ 		if (retval != ERROR_OK) {
+ 			LOG_ERROR("page write error");
+ 			return retval;
+ 		}
+-		LOG_DEBUG("wrote page at 0x%08" PRIx32, offset + n);
++		LOG_DEBUG("wrote page at 0x%08" PRIx32, offset);
++		offset += currsize;
++		buffer += currsize;
++		count -= currsize;
+ 	}
+ 	return ERROR_OK;
+ }
+@@ -430,22 +733,72 @@ static int jtagspi_info(struct flash_bank *bank, struct command_invocation *cmd)
+ 		return ERROR_OK;
+ 	}
+ 
+-	command_print_sameline(cmd, "\nSPIFI flash information:\n"
+-		"  Device \'%s\' (ID 0x%08" PRIx32 ")\n",
+-		info->dev->name, info->dev->device_id);
++	command_print_sameline(cmd, "flash \'%s\', device id = 0x%06" PRIx32
++		", flash size = %" PRIu32 " %sbytes\n(page size = %" PRIu32
++		", read = 0x%02" PRIx8 ", qread = 0x%02" PRIx8
++		", pprog = 0x%02" PRIx8 ", mass_erase = 0x%02" PRIx8
++		", sector size = %" PRIu32 " %sbytes, sector_erase = 0x%02" PRIx8 ")",
++		info->dev.name, info->dev.device_id & 0xFFFFFF,
++		bank->size / 4096 ? bank->size / 1024 : bank->size,
++		bank->size / 4096 ? "k" : "", info->dev.pagesize,
++		info->dev.read_cmd, info->dev.qread_cmd,
++		info->dev.pprog_cmd, info->dev.chip_erase_cmd,
++		info->dev.sectorsize / 4096 ?
++		info->dev.sectorsize / 1024 : info->dev.sectorsize,
++		info->dev.sectorsize / 4096 ? "k" : "",
++		info->dev.erase_cmd);
+ 
+ 	return ERROR_OK;
+ }
+ 
++static const struct command_registration jtagspi_exec_command_handlers[] = {
++	{
++		.name = "set",
++		.handler = jtagspi_handle_set,
++		.mode = COMMAND_EXEC,
++		.usage = "bank_id name chip_size page_size read_cmd unused pprg_cmd "
++			"[ mass_erase_cmd ] [ sector_size sector_erase_cmd ]",
++		.help = "Set device parameters if not autodetected.",
++	},
++	{
++		.name = "cmd",
++		.handler = jtagspi_handle_cmd,
++		.mode = COMMAND_EXEC,
++		.usage = "bank_id num_resp cmd_byte ...",
++		.help = "Send low-level command cmd_byte and following bytes, read num_bytes.",
++	},
++	{
++		.name = "always_4byte",
++		.handler = jtagspi_handle_always_4byte,
++		.mode = COMMAND_EXEC,
++		.usage = "bank_id [ on | off ]",
++		.help = "Use always 4-byte address except for basic 0x03.",
++	},
++
++	COMMAND_REGISTRATION_DONE
++};
++
++static const struct command_registration jtagspi_command_handlers[] = {
++	{
++		.name = "jtagspi",
++		.mode = COMMAND_ANY,
++		.help = "jtagspi command group",
++		.usage = "",
++		.chain = jtagspi_exec_command_handlers,
++	},
++	COMMAND_REGISTRATION_DONE
++};
++
+ const struct flash_driver jtagspi_flash = {
+ 	.name = "jtagspi",
++	.commands = jtagspi_command_handlers,
+ 	.flash_bank_command = jtagspi_flash_bank_command,
+ 	.erase = jtagspi_erase,
+ 	.protect = jtagspi_protect,
+ 	.write = jtagspi_write,
+ 	.read = jtagspi_read,
+ 	.probe = jtagspi_probe,
+-	.auto_probe = jtagspi_probe,
++	.auto_probe = jtagspi_auto_probe,
+ 	.erase_check = default_flash_blank_check,
+ 	.info = jtagspi_info,
+ 	.free_driver_priv = default_flash_free_driver_priv,

artiq-fast/pkgs/openocd.nix

@@ -1,74 +1,35 @@
-{ stdenv, lib, fetchFromGitHub, autoreconfHook, libftdi, libusb1, pkgconfig, hidapi }:
+{ stdenv, buildEnv, lib, fetchFromGitHub, autoreconfHook269, openocd }:
-
+let
-stdenv.mkDerivation rec {
+  bscan_spi_bitstreams-pkg = stdenv.mkDerivation {
-  pname = "openocd-mlabs";
+    name = "bscan_spi_bitstreams";
-  version = "0.10.0";
+    src = fetchFromGitHub {
-
-  src = fetchFromGitHub {
-      owner = "m-labs";
-      repo = "openocd";
-      fetchSubmodules = true;
-      rev = "c383a57adcff332b2c5cf8d55a84626285b42c2c";
-      sha256 = "0xlj9cs72acx3zqagvr7f1c0v6lnqhl8fgrlhgmhmvk5n9knk492";
-  };
-  bscan_spi_bitstreams = fetchFromGitHub {
       owner = "quartiq";
       repo = "bscan_spi_bitstreams";
       rev = "01d8f819f15baf9a8cc5d96945a51e4d267ff564";
       sha256 = "1zqv47kzgvbn4c8cr019a6wcja7gn5h1z4kvw5bhpc72fyhagal9";
-  };
+    };
-
+    phases = ["installPhase"];
-  nativeBuildInputs = [ pkgconfig ];
+    installPhase =
-  buildInputs = [ autoreconfHook libftdi libusb1 hidapi ];
+    ''
-
+    mkdir -p $out/share/bscan-spi-bitstreams
-  configureFlags = [
+    cp $src/*.bit $out/share/bscan-spi-bitstreams
-    "--enable-jtag_vpi"
-    "--enable-usb_blaster_libftdi"
-    "--enable-amtjtagaccel"
-    "--enable-gw16012"
-    "--enable-presto_libftdi"
-    "--enable-openjtag_ftdi"
-    "--enable-oocd_trace"
-    "--enable-buspirate"
-    "--enable-sysfsgpio"
-    "--enable-remote-bitbang"
-    "--disable-werror"
-  ];
-
-  NIX_CFLAGS_COMPILE = [
-    "-Wno-implicit-fallthrough"
-    "-Wno-format-truncation"
-    "-Wno-format-overflow"
-    "-Wno-error=tautological-compare"
-  ];
-
-  postInstall = ''
-    mkdir -p "$out/etc/udev/rules.d"
-    rules="$out/share/openocd/contrib/60-openocd.rules"
-    if [ ! -f "$rules" ]; then
-        echo "$rules is missing, must update the Nix file."
-        exit 1
-    fi
-    ln -s "$rules" "$out/etc/udev/rules.d/"
-
-    mkdir -p "$out/share/bscan-spi-bitstreams"
-    cp ${bscan_spi_bitstreams}/*.bit "$out/share/bscan-spi-bitstreams"
-  '';
-
-  meta = with lib; {
-    description = "Free and Open On-Chip Debugging, In-System Programming and Boundary-Scan Testing";
-    longDescription = ''
-      OpenOCD provides on-chip programming and debugging support with a layered
-      architecture of JTAG interface and TAP support, debug target support
-      (e.g. ARM, MIPS), and flash chip drivers (e.g. CFI, NAND, etc.).  Several
-      network interfaces are available for interactiving with OpenOCD: HTTP,
-      telnet, TCL, and GDB.  The GDB server enables OpenOCD to function as a
-      "remote target" for source-level debugging of embedded systems using the
-      GNU GDB program.
     '';
-    homepage = http://openocd.sourceforge.net/;
-    license = licenses.gpl2Plus;
-    maintainers = with maintainers; [ sb0 ];
-    platforms = platforms.linux;
   };
-}
+  openocd-fixed = openocd.overrideAttrs(oa: {
+    version = "unstable-2021-09-15";
+    src = fetchFromGitHub {
+      owner = "openocd-org";
+      repo = "openocd";
+      rev = "a0bd3c9924870c3b8f428648410181040dabc33c";
+      sha256 = "sha256-YgUsl4/FohfsOncM4uiz/3c6g2ZN4oZ0y5vV/2Skwqg=";
+      fetchSubmodules = true;
+    };
+    # https://review.openocd.org/c/openocd/+/4876
+    patches = oa.patches or [] ++ [ ./openocd-jtagspi.diff ];
+    nativeBuildInputs = oa.nativeBuildInputs or [] ++ [ autoreconfHook269 ];
+  });
+in
+  buildEnv {
+    name = "openocd-bscanspi";
+    paths = [ openocd-fixed bscan_spi_bitstreams-pkg ];
+  }

artiq-fast/pkgs/python-deps.nix

@@ -28,31 +28,16 @@ rec {
 
   pythonparser = python3Packages.buildPythonPackage rec {
     pname = "pythonparser";
-    version = "1.3";
+    version = "1.4";
     src = fetchFromGitHub {
       owner = "m-labs";
       repo = "pythonparser";
-      rev = "5b391fe86f43bb9f4f96c5bc0532e2a112db2936";
+      rev = "5413ee5c9f8760e95c6acd5d6e88dabb831ad201";
-      sha256 = "1gw1fk4y2l6bwq0fg2a9dfc1rvq8cv492dyil96amjdhsxvnx35b";
+      sha256 = "1b9p3pjnfaiaf2k0a3iq39aj2vymfxx139hqdqkd3q4awrwy1957";
     };
-    patches = [ ./pythonparserver.patch ];
     propagatedBuildInputs = with python3Packages; [ regex ];
   };
 
-  pyqtgraph-qt5 = python3Packages.buildPythonPackage rec {
-    pname = "pyqtgraph_qt5";
-    version = "0.11.0";
-    doCheck = false;
-    pythonImportsCheck = [ "pyqtgraph" ];
-    src = fetchFromGitHub {
-      owner = "pyqtgraph";
-      repo = "pyqtgraph";
-      rev = "pyqtgraph-${version}";
-      sha256 = "03fvpkqdn80ni51msvyivmghw41qk4vplwdqndkvzzzlppimdjbn";
-    };
-    propagatedBuildInputs = with python3Packages; [ scipy numpy pyqt5 pyopengl ];
-  };
-
   qasync = python3Packages.buildPythonPackage rec {
     pname = "qasync";
     version = "0.10.0";
@@ -86,21 +71,21 @@ rec {
 
   misoc = python3Packages.buildPythonPackage {
     pname = "misoc";
-    version = if misoc-new then "unstable-2021-02-15" else "unstable-2020-05-29";
+    version = if misoc-new then "unstable-2021-10-10" else "unstable-2021-02-15";
 
     src = if misoc-new
       then (fetchFromGitHub {
         owner = "m-labs";
         repo = "misoc";
-        rev = "d84551418042cea0891ea743442e20684b51e77a";
+        rev = "f5203e406520874e15ab5d070058ef642fc57fd9";
-        sha256 = "1id5qjr9dl4r3vi6jdn7dfpnr2wb08nrm3nfscn18clbbdxybyjn";
+        sha256 = "sha256-/2XTejqj0Bo81HaTrlTSWwInnWwsuqnq+CURXbpIrkA=";
         fetchSubmodules = true;
       })
       else (fetchFromGitHub {
         owner = "m-labs";
         repo = "misoc";
-        rev = "7e5fe8d38835175202dad2c51d37b20b76fd9e16";
+        rev = "d84551418042cea0891ea743442e20684b51e77a";
-        sha256 = "0i8bppz7x2s45lx9n49c0r87pqps09z35yzc17amvx21qsplahxn";
+        sha256 = "1id5qjr9dl4r3vi6jdn7dfpnr2wb08nrm3nfscn18clbbdxybyjn";
         fetchSubmodules = true;
       });
 
@@ -119,13 +104,13 @@ rec {
 
   migen = python3Packages.buildPythonPackage rec {
     pname = "migen";
-    version = "unstable-2021-02-08";
+    version = "unstable-2021-12-16";
 
     src = fetchFromGitHub {
       owner = "m-labs";
       repo = "migen";
-      rev = "7014bdccc11270764186e6a4441fb58238c612aa";
+      rev = "ac703010eaa06ac9b6e32f97c6fa98b15de22b31";
-      sha256 = "12mhmcdf0jqv33ald9x9zb1qi26sw4ywdfgg5saqvmx0pmbmvynk";
+      sha256 = "sha256-qpVj/yJf4hDDc99XXpVPH4EbLC8aCmEtACn5qNc3DGI=";
     };
 
     propagatedBuildInputs = with python3Packages; [ colorama ];
@@ -228,13 +213,13 @@ rec {
 
   migen-axi = python3Packages.buildPythonPackage {
     pname = "migen-axi";
-    version = "unstable-2021-01-22";
+    version = "unstable-2021-09-15";
 
     src = fetchFromGitHub {
       owner = "peteut";
       repo = "migen-axi";
-      rev = "9439ee900358598cecc682db327aa30e506172b5";
+      rev = "9763505ee96acd7572280a2d1233721342dc7c3f";
-      sha256 = "1z5s8ifq7fbpqi6sx2i87rmz63kbgh9ck94fs2qf21ixhxi46nm3";
+      sha256 = "15c7g05n183rka66fl1glzp6h7xjlpy1p6k8biry24dangsmxmvg";
     };
 
     nativeBuildInputs = [ python3Packages.pbr ];
@@ -242,7 +227,7 @@ rec {
 
     postPatch = ''
       substituteInPlace requirements.txt \
-        --replace "jinja2==2.10.3" "jinja2"
+        --replace "jinja2==2.11.3" "jinja2"
       substituteInPlace requirements.txt \
         --replace "future==0.18.2" "future"
       substituteInPlace requirements.txt \

artiq-fast/pkgs/pythonparserver.patch

@@ -1,35 +0,0 @@
-diff --git a/pythonparser/lexer.py b/pythonparser/lexer.py
-index a62eaf1..c70e85a 100644
---- a/pythonparser/lexer.py
-+++ b/pythonparser/lexer.py
-@@ -79,6 +79,8 @@ class Lexer:
-         (3, 4): _reserved_3_1,
-         (3, 5): _reserved_3_5,
-         (3, 6): _reserved_3_5,
-+        (3, 7): _reserved_3_5,
-+        (3, 8): _reserved_3_5,
-     }
-     """
-     A map from a tuple (*major*, *minor*) corresponding to Python version to
-@@ -102,6 +104,8 @@ class Lexer:
-         (3, 4): _string_prefixes_3_3,
-         (3, 5): _string_prefixes_3_3,
-         (3, 6): _string_prefixes_3_6,
-+        (3, 7): _string_prefixes_3_6,
-+        (3, 8): _string_prefixes_3_6,
-     }
-     """
-     A map from a tuple (*major*, *minor*) corresponding to Python version to
-diff --git a/pythonparser/parser.py b/pythonparser/parser.py
-index 10c741d..62b93e1 100644
---- a/pythonparser/parser.py
-+++ b/pythonparser/parser.py
-@@ -419,7 +419,7 @@ class Parser(object):
-             self.expr_stmt_1     = self.expr_stmt_1__26
-             self.yield_expr      = self.yield_expr__26
-             return
--        elif version in ((3, 0), (3, 1), (3, 2), (3, 3), (3, 4), (3, 5), (3, 6)):
-+        elif version in ((3, 0), (3, 1), (3, 2), (3, 3), (3, 4), (3, 5), (3, 6), (3, 7), (3, 8)):
-             if version == (3, 0):
-                 self.with_stmt       = self.with_stmt__26 # lol
-             else:

artiq-fast/rust-platform.nix

@@ -0,0 +1,20 @@
+{ pkgs }:
+let
+  rustManifest = pkgs.fetchurl {
+    url = "https://static.rust-lang.org/dist/2021-01-29/channel-rust-nightly.toml";
+    sha256 = "sha256-EZKgw89AH4vxaJpUHmIMzMW/80wAFQlfcxRoBD9nz0c=";
+   };
+  targets = [];
+  rustChannelOfTargets = _channel: _date: targets:
+    (pkgs.lib.rustLib.fromManifestFile rustManifest {
+       inherit (pkgs) stdenv lib fetchurl patchelf;
+    }).rust.override {
+        inherit targets;
+        extensions = ["rust-src"];
+    };
+  rust = rustChannelOfTargets "nightly" null targets;
+in
+  pkgs.recurseIntoAttrs (pkgs.makeRustPlatform {
+    rustc = rust;
+    cargo = rust;
+  })

artiq-fast/shell-dev.nix

@@ -4,13 +4,14 @@ let
   artiqpkgs = import ./default.nix { inherit pkgs; };
   vivado = import ./vivado.nix { inherit pkgs; };
 in
+  assert pkgs.lib.asserts.assertMsg (!pkgs.lib.strings.versionAtLeast artiqpkgs.artiq.version "7.0") "For ARTIQ 7+, use 'nix develop' on the flake instead.";
   pkgs.mkShell {
     buildInputs = [
       vivado
       pkgs.gnumake
       (pkgs.python3.withPackages(ps: (with ps; [ jinja2 jsonschema numpy paramiko ]) ++ (with artiqpkgs; [ migen microscope misoc jesd204b migen-axi artiq ])))
-      artiqpkgs.cargo
+      artiqpkgs.cargo-legacy
-      artiqpkgs.rustc
+      artiqpkgs.rustc-legacy
       artiqpkgs.binutils-or1k
       artiqpkgs.binutils-arm
       artiqpkgs.llvm-or1k

artiq-fast/vivado.nix

@@ -1,7 +1,7 @@
 # Install Vivado in /opt and add to /etc/nixos/configuration.nix:
 #  nix.sandboxPaths = ["/opt"];
 
-{ pkgs, vivadoPath ? "/opt/Xilinx/Vivado/2020.1" }:
+{ pkgs, vivadoPath ? "/opt/Xilinx/Vivado/2021.1" }:
 
 pkgs.buildFHSUserEnv {
   name = "vivado";

artiq-fast/wfvm-legacy.nix

@@ -0,0 +1,16 @@
+{ pkgs }:
+
+let
+  # Pin nixpkgs to avoid frequent resource-intensive Windows reinstallations on Hydra.
+  wfvm-pkgs = pkgs.fetchFromGitHub {
+    owner = "NixOS";
+    repo = "nixpkgs";
+    rev = "f8248ab6d9e69ea9c07950d73d48807ec595e923";
+    sha256 = "009i9j6mbq6i481088jllblgdnci105b2q4mscprdawg3knlyahk";
+  };
+  wfvm = pkgs.fetchgit {
+    url = "https://git.m-labs.hk/M-Labs/wfvm.git";
+    rev = "4b497938ffd9fcddf84a3dbe2f01524395292adb";
+    sha256 = "0m3kdbbcskqc1lf8b5f7ccbll9b7vkl4r00kbyx3yjb2rs6cqvil";
+  };
+in import "${wfvm}/wfvm" { pkgs = (import wfvm-pkgs {}); }

artiq-fast/wfvm.nix

@@ -10,7 +10,7 @@ let
   };
   wfvm = pkgs.fetchgit {
     url = "https://git.m-labs.hk/M-Labs/wfvm.git";
-    rev = "4b497938ffd9fcddf84a3dbe2f01524395292adb";
+    rev = "c7d9060eeef46bebaf376c95ca37c7a65a2ea896";
-    sha256 = "0m3kdbbcskqc1lf8b5f7ccbll9b7vkl4r00kbyx3yjb2rs6cqvil";
+    sha256 = "022fb7zpn48hg9qihmqmzqdphks7b7cbnw6f5s1qy1in5c7f8rx9";
   };
 in import "${wfvm}/wfvm" { pkgs = (import wfvm-pkgs {}); }

artiq-fast/windows/conda_noarch_packages-6.nix

@@ -0,0 +1,22 @@
+{ pkgs } : [
+
+(pkgs.fetchurl {
+  url = "https://conda.anaconda.org/conda-forge/noarch/prettytable-2.1.0-pyhd8ed1ab_0.tar.bz2";
+  sha256 = "1w71padwzy6ay5g8zl575ali994cssgcgzf5917rap3fmw2mgg4d";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/six-1.16.0-pyhd3eb1b0_0.tar.bz2";
+  sha256 = "120wav3bxbyv0jsvbl94rxsigqqchsqg4qqxccg9ij7ydirmqaql";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/pyqtgraph-0.11.0-py_0.tar.bz2";
+  sha256 = "1jnid69dpvhd8nscmkm761qpqz8ip0gka5av90xs3i0pqkqmffqg";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/cached-property-1.5.2-py_0.tar.bz2";
+  sha256 = "01mcbrsrdwvinyvp0fs2hbkczydb33gbz59ldhb1484w5mm9y9bi";
+})
+]

artiq-fast/windows/conda_noarch_packages-7.nix

@@ -0,0 +1,52 @@
+{ pkgs } : [
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/cached-property-1.5.2-py_0.tar.bz2";
+  sha256 = "01mcbrsrdwvinyvp0fs2hbkczydb33gbz59ldhb1484w5mm9y9bi";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/zipp-3.6.0-pyhd3eb1b0_0.tar.bz2";
+  sha256 = "1wj0hmhn09b4szs5zyslpd1mggy90pbjil6q3lyqkw3z492za80q";
+})
+
+(pkgs.fetchurl {
+  url = "https://conda.anaconda.org/conda-forge/noarch/prettytable-2.4.0-pyhd8ed1ab_0.tar.bz2";
+  sha256 = "1iv2x8m8xf2y8v68kz2lil2zaji7gsz099zs8wsrap03j5vpraf0";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/wheel-0.37.0-pyhd3eb1b0_1.tar.bz2";
+  sha256 = "10bxbfy7dlmbr8b21ddb1k2wkrzhs7j2zgmss38pv4g5xidv9v74";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/pyqtgraph-0.11.0-py_0.tar.bz2";
+  sha256 = "1jnid69dpvhd8nscmkm761qpqz8ip0gka5av90xs3i0pqkqmffqg";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/six-1.16.0-pyhd3eb1b0_0.tar.bz2";
+  sha256 = "120wav3bxbyv0jsvbl94rxsigqqchsqg4qqxccg9ij7ydirmqaql";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/python-dateutil-2.8.2-pyhd3eb1b0_0.tar.bz2";
+  sha256 = "1brzm9v9yvs3xhdh89jzw5xjq4a3r9vizhkhdfcax86d2q52ji97";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/pycparser-2.21-pyhd3eb1b0_0.tar.bz2";
+  sha256 = "1dyi89xx73kq0caz4jx493czn16w0dl1gjhw0c5kw28bxz6i8wm8";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/wcwidth-0.2.5-pyhd3eb1b0_0.tar.bz2";
+  sha256 = "1x3sncbrp7bml6qjss24qyy0rsjbdhnzjwpf6apcd14kzspnr21a";
+})
+
+(pkgs.fetchurl {
+  url = "https://repo.anaconda.com/pkgs/main/noarch/tzdata-2021e-hda174b7_0.tar.bz2";
+  sha256 = "1sxgc0pamsskszm29cxpwzlffydxjr3aqpgly7j1f3ansvchxvb4";
+})
+]

artiq-fast/windows/conda_noarch_packages.nix

@@ -1,27 +0,0 @@
-{ pkgs } : [
-
-(pkgs.fetchurl {
-  url = "https://conda.anaconda.org/conda-forge/noarch/prettytable-0.7.2-py_3.tar.bz2";
-  sha256 = "0b7s4xm6bbkcg37sf1i3mxrbac0vxhryq22m3qx4x9kh6k2c5g5q";
-})
-
-(pkgs.fetchurl {
-  url = "https://repo.anaconda.com/pkgs/main/noarch/six-1.15.0-py_0.tar.bz2";
-  sha256 = "08rsfp9bd2mz8r120s8w5vgncy0gn732xa0lfgbmx833548cfqmb";
-})
-
-(pkgs.fetchurl {
-  url = "https://repo.anaconda.com/pkgs/main/noarch/python-dateutil-2.8.1-py_0.tar.bz2";
-  sha256 = "0cbcd0jq6683ibj8ncsmmrbhbjvwww8i22lb68bx4xfzsmb9z8cb";
-})
-
-(pkgs.fetchurl {
-  url = "https://repo.anaconda.com/pkgs/main/noarch/cached-property-1.5.1-py_1.tar.bz2";
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artiq-fast/windows/conda_win-64_packages-6.nix

@@ -0,0 +1,67 @@
+{ pkgs } : [
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artiq-fast/windows/conda_win-64_packages-7.nix

@@ -0,0 +1,182 @@
+{ pkgs } : [
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+})
+]

artiq-fast/windows/conda_win-64_packages.nix

@@ -1,132 +0,0 @@
-{ pkgs } : [
-
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-
-(pkgs.fetchurl {
-  url = "https://repo.anaconda.com/pkgs/main/win-64/numpy-1.18.5-py37h6530119_0.tar.bz2";
-  sha256 = "1knb5na7ij7ik76blsgwhdsy3i9r2l0154z5g5dkb2ds3sk878np";
-})
-
-(pkgs.fetchurl {
-  url = "https://repo.anaconda.com/pkgs/main/win-64/sqlite-3.32.3-h2a8f88b_0.tar.bz2";
-  sha256 = "1ddzwj0f6jikj6hsasg3vlwamsqhf5lc8k1la7gqbd77s11b8isc";
-})
-
-(pkgs.fetchurl {
-  url = "https://repo.anaconda.com/pkgs/main/win-64/numpy-base-1.18.5-py37hc3f5095_0.tar.bz2";
-  sha256 = "1dyxk2v7rm87najv3f8i04q44wxicfx9qrap9dy2vpqlrz3bj82j";
-})
-
-(pkgs.fetchurl {
-  url = "https://repo.anaconda.com/pkgs/main/win-64/mkl-2020.1-216.tar.bz2";
-  sha256 = "1klj0sjlj5x1anjbkf017f16ssc65dkpg1rrn06njirbhwsc9w5m";
-})
-]

artiq-fast/windows/make_conda_packages.sh

@@ -23,12 +23,12 @@ in
     isolateNetwork = false;
     script = ''
       cat > getcondapackages.bat << EOF
-      date 06-22-20
+      date 12-14-21
       call conda config --prepend channels https://conda.m-labs.hk/artiq-beta
       call conda config --append channels conda-forge
+      call conda config --prepend channels numba
       call conda create -n artiq -y
       call conda install --dry-run --json -n artiq artiq > packages.json
-      date 04-20-20
       EOF
       \${wfvm.utils.win-put}/bin/win-put getcondapackages.bat
       \${wfvm.utils.win-exec}/bin/win-exec '.\Anaconda3\Scripts\activate && getcondapackages'

artiq-fast/windows/run-test.nix

@@ -10,26 +10,31 @@ let
       inherit port;
     }) tcpPorts;
 
-  wfvm = import ../wfvm.nix { inherit pkgs; };
+  artiq6 = pkgs.lib.strings.versionAtLeast artiqpkgs.artiq.version "6.0";
+  artiq7 = pkgs.lib.strings.versionAtLeast artiqpkgs.artiq.version "7.0";
+  wfvm = import (if artiq6 then ../wfvm.nix else ../wfvm-legacy.nix) { inherit pkgs; };
   conda-deps = {
     name = "conda-deps";
     script = let
-      artiq6 = pkgs.lib.strings.versionAtLeast artiqpkgs.artiq.version "6.0";
       qt-asyncio-package = if artiq6 then artiqpkgs.conda-qasync else artiqpkgs.conda-quamash;
-      conda-deps-noarch = import (if artiq6 then ./conda_noarch_packages.nix else ./conda_noarch_packages-legacy.nix) { inherit pkgs; };
+      conda-deps-noarch = import (if artiq7 then ./conda_noarch_packages-7.nix else if artiq6 then ./conda_noarch_packages-6.nix else ./conda_noarch_packages-5.nix) { inherit pkgs; };
-      conda-deps-win-64 = import (if artiq6 then ./conda_win-64_packages.nix else ./conda_win-64_packages-legacy.nix) { inherit pkgs; };
+      conda-deps-win-64 = import (if artiq7 then ./conda_win-64_packages-7.nix else if artiq6 then ./conda_win-64_packages-6.nix else ./conda_win-64_packages-5.nix) { inherit pkgs; };
       conda-packages-put = pkgs.lib.strings.concatStringsSep "\n"
           ( (map (package: ''win-put ${package} 'fake-channel/noarch' '') conda-deps-noarch)
              ++ (map (package: ''win-put ${package} 'fake-channel/win-64' '') conda-deps-win-64) );
+      conda-packages-legacy-put = if artiq7 then "" else
+        ''
+        win-put ${artiqpkgs.conda-windows-binutils-or1k}/win-64/*.tar.bz2 'fake-channel/win-64'
+        win-put ${artiqpkgs.conda-windows-llvm-or1k}/win-64/*.tar.bz2 'fake-channel/win-64'
+        win-put ${artiqpkgs.conda-windows-llvmlite-artiq}/win-64/*.tar.bz2 'fake-channel/win-64'
+        '';
     in
       ''
       win-exec 'mkdir fake-channel && mkdir fake-channel\noarch && mkdir fake-channel\win-64'
 
       ${conda-packages-put}
 
-      win-put ${artiqpkgs.conda-windows-binutils-or1k}/win-64/*.tar.bz2 'fake-channel/win-64'
+      ${conda-packages-legacy-put}
-      win-put ${artiqpkgs.conda-windows-llvm-or1k}/win-64/*.tar.bz2 'fake-channel/win-64'
-      win-put ${artiqpkgs.conda-windows-llvmlite-artiq}/win-64/*.tar.bz2 'fake-channel/win-64'
 
       win-put ${artiqpkgs.conda-pythonparser}/noarch/*.tar.bz2 'fake-channel/noarch'
       win-put ${artiqpkgs.conda-sipyco}/noarch/*.tar.bz2 'fake-channel/noarch'

artiq-full.nix

@@ -1,12 +1,12 @@
-{ pkgs ? import <nixpkgs> {}
+{ pkgs ? import <nixpkgs> { overlays = [ (import ./artiq-fast/mozilla-overlay.nix) ]; }
-, a6p ? <a6p>
+, use-generated ? <use-generated>
 }:
 
 let
   sinaraSystemsRev = builtins.readFile <artiq-board-generated/sinara-rev.txt>;
   sinaraSystemsHash = builtins.readFile <artiq-board-generated/sinara-hash.txt>;
   sinaraSystemsSrc =
-    if a6p
+    if use-generated
     then pkgs.fetchgit {
       url = "https://git.m-labs.hk/M-Labs/sinara-systems.git";
       rev = sinaraSystemsRev;
@@ -14,7 +14,7 @@ let
     }
     else <sinaraSystemsSrc>;
   artiq-fast =
-    if a6p
+    if use-generated
     then <artiq-board-generated/fast>
     else <artiq-fast>;
   artiqVersion = import (artiq-fast + "/pkgs/artiq-version.nix") {
@@ -47,7 +47,7 @@ let
     ''
     mkdir $out
 
-    ${if a6p
+    ${if use-generated
       then ''
         cp -a ${<artiq-board-generated>} $out/board-generated
         ln -s board-generated/fast $out/fast
@@ -59,7 +59,7 @@ let
     cp ${./artiq-full}/extras.nix $out
     cp ${./artiq-full}/*.patch $out
 
-    ${if a6p
+    ${if use-generated
       then ''
         REV=${sinaraSystemsRev}
         HASH=${sinaraSystemsHash}
@@ -74,10 +74,10 @@ let
         HASH=`nix-hash --type sha256 --base32 $SINARA_SRC_CLEAN`
       ''}
     cat > $out/default.nix << EOF
-    { pkgs ? import <nixpkgs> {}}:
+    { pkgs ? import <nixpkgs> { overlays = [ (import ./fast/mozilla-overlay.nix) ]; }}:
 
     let
-      artiq-fast = import ${if a6p then "./board-generated" else "."}/fast { inherit pkgs; };
+      artiq-fast = import ${if use-generated then "./board-generated" else "."}/fast { inherit pkgs; };
       ddbDeps = [
         artiq-fast.artiq
         (pkgs.python3.withPackages (ps: [ ps.jsonschema ]))
@@ -90,11 +90,11 @@ let
         builtins.map (variant: "\"${variant}\"") standaloneVariants
       )}];
 
-      vivado = import ${if a6p then "./board-generated" else "."}/fast/vivado.nix {
+      vivado = import ${if use-generated then "./board-generated" else "."}/fast/vivado.nix {
         inherit pkgs;
       };
       artiq-board =
-        ${if a6p
+        ${if use-generated
         then ''
           import ./artiq-board-vivado.nix {
             inherit pkgs vivado;
@@ -107,6 +107,7 @@ let
         else ''
           import ./fast/artiq-board.nix {
             inherit pkgs vivado;
+            rustPlatform = import ./fast/rust-platform.nix { inherit pkgs; };
           }
         ''};
       conda-artiq-board = import ./conda-artiq-board.nix { inherit pkgs; };
@@ -147,7 +148,7 @@ let
           })
       ) {} ${serializedTargets};
       drtio-systems = {
-        ${pkgs.lib.optionalString a6p ''
+        ${pkgs.lib.optionalString use-generated ''
           ap = {
             master = "apmaster";
             satellites = {
@@ -161,10 +162,16 @@ let
               "1" = "berkeley3satellite";
             };
           };
-          bonn1 = {
+          npl3 = {
-            master = "bonn1master";
+            master = "npl3master";
             satellites = {
-              "1" = "bonn1satellite";
+              "1" = "npl3satellite";
+            };
+          };
+          npl5 = {
+            master = "npl5master";
+            satellites = {
+              "1" = "npl5satellite";
             };
           };
           ptb3 = {
@@ -179,6 +186,18 @@ let
               "1" = "purduesatellite";
             };
           };
+          roa1 = {
+            master = "roa1master";
+            satellites = {
+              "1" = "roa1satellite";
+            };
+          };
+          sias = {
+            master = "siasmaster";
+            satellites = {
+              "1" = "siassatellite";
+            };
+          };
           stfc = {
             master = "stfcmaster";
             satellites = {
@@ -191,6 +210,12 @@ let
               "1" = "ubirmingham3satellite";
             };
           };
+          ustc5 = {
+            master = "ustc5master";
+            satellites = {
+              "1" = "ustc5satellite";
+            };
+          };
           wipm7 = {
             master = "wipm7master";
             satellites = {
@@ -214,7 +239,7 @@ let
             echo file device_db_template \$out/device_db.py >> \$out/nix-support/hydra-build-products
             ";
         })) drtio-systems;
-      extras = import ./extras.nix { inherit pkgs; inherit (artiq-fast) sipyco asyncserial pyqtgraph-qt5 artiq; };
+      extras = import ./extras.nix { inherit pkgs; inherit (artiq-fast) sipyco asyncserial artiq; };
     in
       artiq-fast // artiq-targets // drtio-ddbs // extras // rec {
         conda-artiq-board-kasli-tester = conda-artiq-board {

artiq-full/artiq-targets.nix

@@ -62,4 +62,21 @@ kasli // {
     variant = "satellite";
     buildCommand = "python -m artiq.gateware.targets.sayma_amc --jdcg-type syncdds";
   };
+}) // (pkgs.lib.optionalAttrs (pkgs.lib.strings.versionAtLeast artiqVersion "7.0") {
+  artiq-board-kc705-nist_clock_master = {
+    target = "kc705";
+    variant = "nist_clock_master";
+  };
+  artiq-board-kc705-nist_qc2_master = {
+    target = "kc705";
+    variant = "nist_qc2_master";
+  };
+  artiq-board-kc705-nist_clock_satellite = {
+    target = "kc705";
+    variant = "nist_clock_satellite";
+  };
+  artiq-board-kc705-nist_qc2_satellite = {
+    target = "kc705";
+    variant = "nist_qc2_satellite";
+  };
 })

artiq-full/example-user-env.nix

@@ -20,7 +20,8 @@ in
         ps.pandas
         ps.numpy
         ps.scipy
-        ps.numba
+        # our newer llvmlite conflicts with the one in nixpkgs (21.05), reenable after nixpkgs updates llvmlite
+        #ps.numba
         ps.bokeh
         matplotlib-qt
         # cirq is broken and doesn't build (as of 20.09.3281.06b11191834)
@@ -31,7 +32,7 @@ in
 
       artiq-full.openocd
       pkgs.gtkwave
-      #pkgs.spyder  # broken on 20.03
+      pkgs.spyder
       pkgs.R
     ];
   } "touch $out";

artiq-full/extras.nix

@@ -1,10 +1,10 @@
-{ pkgs, sipyco, asyncserial, pyqtgraph-qt5, artiq }:
+{ pkgs, sipyco, asyncserial, artiq }:
 let
   condaBuild = import ./fast/conda/build.nix { inherit pkgs; };
   condaFakeSource = import ./fast/conda/fake-source.nix { inherit pkgs; };
   dualPackage = (
-    { name, version, src, pythonOptions ? {}, condaOptions ? {}, withManual ? true}:
+    { name, version, src, pythonOptions ? {}, condaOptions ? {}, enabled ? true, withManual ? true}:
-      {
+      pkgs.lib.optionalAttrs enabled ({
         "${name}" = pkgs.python3Packages.buildPythonPackage ({
           inherit version;
           name = "${name}-${version}";
@@ -38,7 +38,7 @@ let
               echo doc manual ${dest}/html index.html >> $out/nix-support/hydra-build-products
               '';
         };
-      })
+      }))
     );
   # https://github.com/m-labs/artiq/issues/23
   hidapi = pkgs.hidapi.overrideAttrs (oa: {
@@ -231,61 +231,45 @@ in
     withManual = false;
     src = pkgs.fetchgit {
       url = "https://gitlab.com/duke-artiq/flake8-artiq.git";
-      rev = "779e41c8cf3e05dac4b7c2802640eb0442cf65d9";
+      rev = "1216092974140a561850905734fc22fdacdc2cde";
-      sha256 = "1vz6m1w1i1xf72wqzl4ahlv9mcxa6zn8wv05s4yq4cph0hk6inn0";
+      sha256 = "0rkab2qdwyzms6nxc44jzb5grvkkbpjwwmfv2zj96cm6cm8d9pdr";
     };
     pythonOptions = {
       propagatedBuildInputs = [ pkgs.python3Packages.flake8 ];
-      checkInputs = [ pkgs.python3Packages.pytest pkgs.python3Packages.mypy pkgs.python3Packages.flake8 ];
+      checkInputs = [ pkgs.python3Packages.pytestCheckHook ];
-      checkPhase =
-        ''
-        pytest
-        mypy
-        flake8
-        '';
     };
     condaOptions = { dependencies = [ "flake8" ]; };
-  }) // (dualPackage {
+  }) // (dualPackage rec {
     name = "dax";
-    version = "6.3";
+    version = "6.6";
+    enabled = builtins.head (builtins.splitVersion version) == builtins.head (builtins.splitVersion artiq.version);
     withManual = false;
     src = pkgs.fetchgit {
       url = "https://gitlab.com/duke-artiq/dax.git";
       rev = "v${version}";
-      sha256 = "1agxyx2rxylrwc3zyz2czdbfv2sxrx5mrwahm0n7gnn87f32h36v";
+      sha256 = "1xf1snd0hsa94r8rdl17kwc5x0ig8hx29c0blpcihbh6r0j1cg7q";
     };
     pythonOptions = {
       VERSIONEER_OVERRIDE = version;
       inherit (pkgs.python3Packages.pygit2) SSL_CERT_FILE;
       propagatedBuildInputs = [ artiq sipyco ]
-        ++ (with pkgs.python3Packages; [ numpy scipy pyvcd natsort pygit2 matplotlib graphviz h5py networkx ]);
+        ++ (with pkgs.python3Packages; [ numpy scipy pyvcd natsort pygit2 matplotlib graphviz h5py networkx sortedcontainers ]);
-      checkInputs = [ pkgs.python3Packages.pytest pkgs.python3Packages.mypy pkgs.python3Packages.flake8 ];
+      checkInputs = [ pkgs.python3Packages.pytestCheckHook ];
-      checkPhase =
-        ''
-        pytest
-        mypy
-        flake8
-        '';
     };
-    condaOptions = { dependencies = [ "python>=3.7" "artiq" "sipyco" "numpy" "scipy" "pyvcd" "natsort" "pygit2" "matplotlib" "python-graphviz" "h5py" "networkx" ]; };
+    condaOptions = { dependencies = [ "python>=3.7" "artiq" "sipyco" "numpy" "scipy" "pyvcd" "natsort" "pygit2" "matplotlib" "python-graphviz" "h5py" "networkx" "sortedcontainers" ]; };
   }) // (dualPackage {
     name = "dax-applets";
     version = "0.0.0";
     withManual = false;
     src = pkgs.fetchgit {
       url = "https://gitlab.com/duke-artiq/dax-applets.git";
-      rev = "e25f0c83ef246d2913cbd97379b67ac02896745b";
+      rev = "3cd1aefb03208021a38fd04803f6dcff25f61e1d";
-      sha256 = "0d0fkw27bhd0hky512km6iiiagwkdzw4vxgcd4cjq08nmh72jxv1";
+      sha256 = "0kk745fc8dri0zs1db790zl0dja4ibz4cd2h85xq6j6ar1s6afwj";
     };
     pythonOptions = {
-      propagatedBuildInputs = [ artiq pyqtgraph-qt5 ]
+      propagatedBuildInputs = [ artiq ]
-        ++ (with pkgs.python3Packages; [ numpy pyqt5 ]);
+        ++ (with pkgs.python3Packages; [ numpy pyqt5 pyqtgraph ]);
-      checkInputs = [ pkgs.python3Packages.mypy pkgs.python3Packages.flake8 ];
+      doCheck = false;
-      checkPhase =
-        ''
-        mypy
-        flake8
-        '';
     };
     condaOptions = { dependencies = [ "python>=3.5" "artiq" "numpy" "pyqt" "pyqtgraph" ]; };
   })

artiq-zynq.nix

@@ -0,0 +1,88 @@
+let
+  pkgs = import <nixpkgs> { overlays = [ (import ./artiq-fast/mozilla-overlay.nix) ]; };
+  artiq-zynq = import <artiq-zynq>;
+  artiq-fast = import <artiq-fast> { inherit pkgs; };
+
+  zynq-rs = import artiq-zynq.zynq-rs;
+  # New zynq-rs versions with Kasli-SoC support have the multiboard "szl" package.
+  # Older versions need the SZL environment variable set to the SZL ELF to be loaded.
+  szlEnv = if zynq-rs ? "szl" then "${zynq-rs.szl}" else "${zynq-rs.zc706-szl}/szl.elf";
+in
+  (
+    builtins.mapAttrs (key: value: pkgs.lib.hydraJob value) artiq-zynq
+  ) // {
+    gateware-sim = pkgs.lib.hydraJob (pkgs.stdenv.mkDerivation {
+      name = "gateware-sim";
+      buildInputs = [ artiq-fast.migen artiq-fast.migen-axi artiq-fast.artiq ];
+
+      phases = [ "buildPhase" ];
+
+      buildPhase =
+        ''
+        python -m unittest discover ${<artiq-zynq>}/src/gateware -v
+        touch $out
+        '';
+    });
+    zc706-hitl-tests = pkgs.lib.hydraJob (pkgs.stdenv.mkDerivation {
+      name = "zc706-hitl-tests";
+
+      # requires patched Nix
+      __networked = true;
+
+      buildInputs = [
+        pkgs.netcat pkgs.openssh pkgs.rsync artiq-fast.artiq artiq-fast.artiq-netboot
+      ];
+      phases = [ "buildPhase" ];
+
+      buildPhase =
+        ''
+        export NIX_SSHOPTS="-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_ed25519"
+        LOCKCTL=$(mktemp -d)
+        mkfifo $LOCKCTL/lockctl
+
+        cat $LOCKCTL/lockctl | ${pkgs.openssh}/bin/ssh \
+        $NIX_SSHOPTS \
+        rpi-4 \
+        'mkdir -p /tmp/board_lock && flock /tmp/board_lock/zc706-1 -c "echo Ok; cat"' \
+        | (
+          # End remote flock via FIFO
+          atexit_unlock() {
+            echo > $LOCKCTL/lockctl
+          }
+          trap atexit_unlock EXIT
+
+          # Read "Ok" line when remote successfully locked
+          read LOCK_OK
+
+          echo Power cycling board...
+          (echo b; sleep 5; echo B; sleep 5) | nc -N -w6 192.168.1.31 3131
+          echo Power cycle done.
+
+          export USER=hydra
+          export OPENOCD_ZYNQ=${artiq-zynq.zynq-rs}/openocd
+          export SZL=${szlEnv}
+          pushd ${<artiq-zynq>}
+          bash ${<artiq-zynq>}/remote_run.sh -h rpi-4 -o "$NIX_SSHOPTS" -d ${artiq-zynq.zc706-nist_qc2-jtag}
+          popd
+
+          echo Waiting for the firmware to boot...
+          sleep 15
+
+          echo Running test kernel...
+          artiq_run --device-db ${<artiq-zynq>}/examples/device_db.py ${<artiq-zynq>}/examples/mandelbrot.py
+
+          echo Running ARTIQ unit tests...
+          export ARTIQ_ROOT=${<artiq-zynq>}/examples
+          export ARTIQ_LOW_LATENCY=1
+          python -m unittest discover artiq.test.coredevice -v
+
+          touch $out
+
+          echo Completed
+
+          (echo b; sleep 5) | nc -N -w6 192.168.1.31 3131
+          echo Board powered off
+        )
+        '';
+    });
+  }

hydra/artiq.json

@@ -9,31 +9,13 @@
         "schedulingshares": 10,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
             "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "artiqSrc": { "type": "git", "value": "git://github.com/m-labs/artiq.git master 1", "emailresponsible": false }
         }
     },
-    "board-generated-beta": {
-        "enabled": 1,
-        "hidden": false,
-        "description": "Generated code for ARTIQ boards (beta version)",
-        "nixexprinput": "nixScripts",
-        "nixexprpath": "artiq-board-generated",
-        "checkinterval": 14400,
-        "schedulingshares": 1,
-        "enableemail": false,
-        "emailoverride": "",
-        "keepnr": 10,
-        "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
-            "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
-            "sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems.git master 1", "emailresponsible": false },
-            "artiq-fast": { "type": "sysbuild", "value": "artiq:fast-beta:generated-nix", "emailresponsible": false }
-        }
-    },
     "full-beta": {
         "enabled": 1,
         "hidden": false,
@@ -44,12 +26,13 @@
         "schedulingshares": 1,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
             "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
-            "a6p": { "type": "boolean", "value": "true" },
+            "use-generated": { "type": "boolean", "value": "false" },
-            "artiq-board-generated": { "type": "sysbuild", "value": "artiq:board-generated-beta:generated-nix", "emailresponsible": false }
+            "sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems.git master 1", "emailresponsible": false },
+            "artiq-fast": { "type": "sysbuild", "value": "artiq:fast-beta:generated-nix", "emailresponsible": false }
         }
     },
 
@@ -63,9 +46,9 @@
         "schedulingshares": 10,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-20.09", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "artiqSrc": { "type": "git", "value": "git://github.com/m-labs/artiq.git release-6 1", "emailresponsible": false }
         }
@@ -73,16 +56,16 @@
     "board-generated": {
         "enabled": 1,
         "hidden": false,
-        "description": "Generated code for ARTIQ boards",
+        "description": "Generated code for ARTIQ boards (ARTIQ 6 only)",
         "nixexprinput": "nixScripts",
         "nixexprpath": "artiq-board-generated",
         "checkinterval": 14400,
         "schedulingshares": 1,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-20.09", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems.git master 1", "emailresponsible": false },
             "artiq-fast": { "type": "sysbuild", "value": "artiq:fast:generated-nix", "emailresponsible": false }
@@ -98,11 +81,11 @@
         "schedulingshares": 1,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-20.09", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
-            "a6p": { "type": "boolean", "value": "true" },
+            "use-generated": { "type": "boolean", "value": "true" },
             "artiq-board-generated": { "type": "sysbuild", "value": "artiq:board-generated:generated-nix", "emailresponsible": false }
         }
     },
@@ -117,9 +100,9 @@
         "schedulingshares": 10,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-20.09", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "artiqSrc": { "type": "git", "value": "git://github.com/m-labs/artiq.git release-5 1", "emailresponsible": false }
         }
@@ -134,16 +117,42 @@
         "schedulingshares": 1,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-20.09", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems.git master 1", "emailresponsible": false },
-            "a6p": { "type": "boolean", "value": "false" },
+            "use-generated": { "type": "boolean", "value": "false" },
             "artiq-fast": { "type": "sysbuild", "value": "artiq:fast-legacy:generated-nix", "emailresponsible": false }
         }
     },
 
+    "fast-flakes": {
+        "enabled": 1,
+        "type": 1,
+        "hidden": false,
+        "description": "Core ARTIQ packages to build fast for CI purposes (Nix flakes version)",
+        "flake": "github:m-labs/artiq",
+        "checkinterval": 300,
+        "schedulingshares": 10,
+        "enableemail": false,
+        "emailoverride": "",
+        "keepnr": 50
+    },
+
+    "nac3": {
+        "enabled": 1,
+        "type": 1,
+        "hidden": false,
+        "description": "Third generation ARTIQ compiler",
+        "flake": "git+https://git.m-labs.hk/M-Labs/nac3.git",
+        "checkinterval": 300,
+        "schedulingshares": 10,
+        "enableemail": false,
+        "emailoverride": "",
+        "keepnr": 50
+    },
+
     "gluelogic": {
         "enabled": 1,
         "hidden": false,
@@ -154,9 +163,9 @@
         "schedulingshares": 1,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.11", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "urukulSrc": { "type": "git", "value": "git://github.com/quartiq/urukul", "emailresponsible": false },
             "mirnySrc": { "type": "git", "value": "git://github.com/quartiq/mirny", "emailresponsible": false },
@@ -165,23 +174,65 @@
         }
     },
 
-    "zynq": {
+    "zynq-rs": {
         "enabled": 1,
         "hidden": false,
-        "description": "ARTIQ on Zynq",
+        "description": "Bare-metal Rust on Zynq-7000",
         "nixexprinput": "nixScripts",
-        "nixexprpath": "zynq.nix",
+        "nixexprpath": "zynq-rs.nix",
         "checkinterval": 300,
         "schedulingshares": 1,
         "enableemail": false,
         "emailoverride": "",
-        "keepnr": 10,
+        "keepnr": 50,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-20.09", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
+            "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
+            "zynq-rs": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/zynq-rs.git", "emailresponsible": false },
+
+            "gitea_repo_name": { "value": "zynq-rs", "type": "string" },
+            "gitea_repo_owner": { "value": "M-Labs", "type": "string" },
+            "gitea_status_repo": { "value": "zynq-rs", "type": "string" }
+        }
+    },
+    "zynq-beta": {
+        "enabled": 1,
+        "hidden": false,
+        "description": "ARTIQ on Zynq-7000 (beta version)",
+        "nixexprinput": "nixScripts",
+        "nixexprpath": "artiq-zynq.nix",
+        "checkinterval": 300,
+        "schedulingshares": 1,
+        "enableemail": false,
+        "emailoverride": "",
+        "keepnr": 50,
+        "inputs": {
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
+            "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
+            "artiq-fast": { "type": "sysbuild", "value": "artiq:fast-beta:generated-nix", "emailresponsible": false },
+            "artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git", "emailresponsible": false },
+
+            "gitea_repo_name": { "value": "artiq-zynq", "type": "string" },
+            "gitea_repo_owner": { "value": "M-Labs", "type": "string" },
+            "gitea_status_repo": { "value": "artiq-zynq", "type": "string" }
+        }
+    },
+    "zynq": {
+        "enabled": 1,
+        "hidden": false,
+        "description": "ARTIQ on Zynq-7000",
+        "nixexprinput": "nixScripts",
+        "nixexprpath": "artiq-zynq.nix",
+        "checkinterval": 300,
+        "schedulingshares": 1,
+        "enableemail": false,
+        "emailoverride": "",
+        "keepnr": 50,
+        "inputs": {
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "artiq-fast": { "type": "sysbuild", "value": "artiq:fast:generated-nix", "emailresponsible": false },
-            "zynq-rs": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/zynq-rs.git", "emailresponsible": false },
+            "artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git release-6", "emailresponsible": false },
-            "artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git", "emailresponsible": false },
 
             "gitea_repo_name": { "value": "artiq-zynq", "type": "string" },
             "gitea_repo_owner": { "value": "M-Labs", "type": "string" },

hydra/mcu.json

@@ -11,10 +11,10 @@
         "emailoverride": "",
         "keepnr": 10,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.11", "emailresponsible": false },
             "mozillaOverlay": { "type": "git", "value": "git://github.com/mozilla/nixpkgs-mozilla.git", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
-            "stabilizerSrc": { "type": "git", "value": "git://github.com/quartiq/stabilizer.git", "emailresponsible": false },
+            "stabilizerSrc": { "type": "git", "value": "git://github.com/HarryMakes/stabilizer.git pre-mqtt 1", "emailresponsible": false },
             "thermostatSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/thermostat.git", "emailresponsible": false },
             "humpbackDdsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/humpback-dds.git", "emailresponsible": false },
             "saymaMmcSrc": { "type": "git", "value": "git://github.com/sinara-hw/openMMC sayma-devel", "emailresponsible": false }

hydra/web.json

@@ -11,7 +11,7 @@
         "emailoverride": "",
         "keepnr": 10,
         "inputs": {
-            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
+            "nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.11", "emailresponsible": false },
             "nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
             "webSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/web2019.git", "emailresponsible": false }
         }

mcu/default.nix

@@ -8,23 +8,14 @@ let
   rustPlatform = pkgs.recurseIntoAttrs (pkgs.callPackage ./rustPlatform.nix {
     inherit rustManifest;
   });
-  buildStm32Firmware = { name, src, patchPhase ? "", extraNativeBuildInputs ? [], checkPhase ? "", ... } @ args:
+  buildStm32Firmware = { name, src, cargoDepsName ? name, patchPhase ? "", extraNativeBuildInputs ? [], checkPhase ? "", doCheck ? true, binaryName ? name, extraCargoBuildArgs ? "" }:
     let
-      # If binaryName is specified as an arg of buildStm32Firmware,
-      # then the .nix containing the cargoSha256 must be named "cargosha256-${binaryName}.nix";
-      # otherwise, the .nix must be named "cargosha256.nix".
       cargoSha256Drv = pkgs.runCommand "${name}-cargosha256" { } ''
-        cp "${src}/cargosha256${
+        cp "${src}/cargosha256.nix" $out
-          if (args ? binaryName) then "-" + args.binaryName else ""
-        }.nix" $out
         '';
-      # If binaryName is specified as an arg of buildStm32Firmware,
-      # then use it as the filename of the ELF generated from `cargo build`;
-      # otherwise, use the `name` arg (i.e. the Rust package name) as the ELF filename.
-      binaryName = if (args ? binaryName) then args.binaryName else name;
     in
       rustPlatform.buildRustPackage rec {
-        inherit name;
+        inherit name cargoDepsName;
         version = "0.0.0";
 
         inherit src;
@@ -34,10 +25,12 @@ let
         nativeBuildInputs = [ pkgs.llvm ] ++ extraNativeBuildInputs;
         buildPhase = ''
           export CARGO_HOME=$(mktemp -d cargo-home.XXX)
-          cargo build --release
+          cargo build --release --bin ${binaryName} ${extraCargoBuildArgs}
         '';
 
-        inherit checkPhase;
+        inherit checkPhase doCheck;
+        # binaryName defaults to the `name` arg (i.e. the Rust package name);
+        # it is used as the Cargo binary filename
         installPhase = ''
           mkdir -p $out $out/nix-support
           cp target/thumbv7em-none-eabihf/release/${binaryName} $out/${name}.elf
@@ -50,10 +43,13 @@ let
       };
   migen = (import ../artiq-fast/pkgs/python-deps.nix { inherit (pkgs) lib fetchgit fetchFromGitHub python3Packages; misoc-new = true; }).migen;
 in
-  {
+  pkgs.lib.attrsets.mapAttrs'
-    stabilizer-dual-iir = buildStm32Firmware {
+    (name: value: pkgs.lib.attrsets.nameValuePair ("stabilizer-" + name)
-      name = "stabilizer-dual-iir";
+    (buildStm32Firmware ({
-      binaryName = "dual-iir";
+      name = "stabilizer-" + name;
+      # If binaryName is not specified, use the attribute name as binaryName by default.
+      binaryName = name;
+      cargoDepsName = "stabilizer";
       src = <stabilizerSrc>;
       patchPhase = ''
         substituteInPlace src/hardware/configuration.rs \
@@ -62,7 +58,25 @@ in
           --replace "Ipv4Address::new(10, 34, 16, 1)" \
                     "Ipv4Address::new(192, 168, 1, 1)"
       '';
-    };
+      doCheck = false;
+    } // value))) {
+      dual-iir = {};
+      dual-iir-pounder_v1_1 = {
+        binaryName = "dual-iir";
+        extraCargoBuildArgs = "--features pounder_v1_1";
+      };
+      lockin-external = {};
+      lockin-external-pounder_v1_1 = {
+        binaryName = "lockin-external";
+        extraCargoBuildArgs = "--features pounder_v1_1";
+      };
+      lockin-internal = {};
+      lockin-internal-pounder_v1_1 = {
+        binaryName = "lockin-internal";
+        extraCargoBuildArgs = "--features pounder_v1_1";
+      };
+    } //
+  {
     thermostat = buildStm32Firmware {
       name = "thermostat";
       src = <thermostatSrc>;

mcu/rustPlatform.nix

@@ -10,7 +10,7 @@ let
   ];
   rustChannel =
     lib.rustLib.fromManifestFile rustManifest {
-      inherit stdenv fetchurl patchelf;
+      inherit stdenv lib fetchurl patchelf;
     };
   rust =
     rustChannel.rust.override {

zynq-rs.nix

@@ -0,0 +1,7 @@
+let
+  pkgs = import <nixpkgs> {};
+  zynq-rs = import <zynq-rs>;
+in
+  (
+    builtins.mapAttrs (key: value: pkgs.lib.hydraJob value) zynq-rs
+  )

zynq.nix

@@ -1,65 +0,0 @@
-let
-  pkgs = import <nixpkgs> {};
-  zynq-rs-latest = import <zynq-rs>;
-  artiq-zynq = import <artiq-zynq>;
-  artiq-fast = import <artiq-fast> { inherit pkgs; };
-in
-  (
-    builtins.mapAttrs (key: value: pkgs.lib.hydraJob value) zynq-rs-latest
-  ) // (
-    builtins.mapAttrs (key: value: pkgs.lib.hydraJob value) artiq-zynq
-  ) // {
-    gateware-sim = pkgs.lib.hydraJob (pkgs.stdenv.mkDerivation {
-      name = "gateware-sim";
-      buildInputs = [ artiq-fast.migen artiq-fast.migen-axi artiq-fast.artiq ];
-
-      phases = [ "buildPhase" ];
-
-      buildPhase =
-        ''
-        python -m unittest discover ${<artiq-zynq>}/src/gateware -v
-        touch $out
-        '';
-    });
-    zc706-hitl-tests = pkgs.lib.hydraJob (pkgs.stdenv.mkDerivation {
-      name = "zc706-hitl-tests";
-
-      # requires patched Nix
-      __networked = true;
-
-      buildInputs = [
-        pkgs.netcat pkgs.openssh pkgs.rsync artiq-fast.artiq artiq-fast.artiq-netboot
-      ];
-      phases = [ "buildPhase" ];
-
-      buildPhase =
-        ''
-        echo Power cycling board...
-        (echo b; sleep 5; echo B; sleep 5) | nc -N -w6 192.168.1.31 3131
-        echo Power cycle done.
-
-        export USER=hydra
-        export OPENOCD_ZYNQ=${artiq-zynq.zynq-rs}/openocd
-        export SZL=${(import artiq-zynq.zynq-rs).zc706-szl}/szl.elf
-        pushd ${<artiq-zynq>}
-        bash ${<artiq-zynq>}/remote_run.sh -h rpi-4 -o "-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_rsa" -d ${artiq-zynq.zc706-nist_qc2-jtag}
-        popd
-
-        echo Waiting for the firmware to boot...
-        sleep 15
-
-        echo Running test kernel...
-        artiq_run --device-db ${<artiq-zynq>}/examples/device_db.py ${<artiq-zynq>}/examples/mandelbrot.py
-
-        echo Running ARTIQ unit tests...
-        ARTIQ_ROOT=${<artiq-zynq>}/examples python -m unittest discover artiq.test.coredevice -v
-
-        touch $out
-
-        echo Completed
-
-        (echo b; sleep 5) | nc -N -w6 192.168.1.31 3131
-        echo Board powered off
-        '';
-    });
-  }