si5324: crystal_{ref -> as_ckin2} [nfc]

This makes it clear that by itself, the flag does not
cause the input mux to be changed.

src/libboard_artiq/src/si5324.rs

@@ -29,7 +29,7 @@ pub struct FrequencySettings {
     pub n31: u32,
     pub n32: u32,
     pub bwsel: u8,
-    pub crystal_ref: bool
+    pub crystal_as_ckin2: bool
 }
 
 pub enum Input {
@@ -84,7 +84,7 @@ fn map_frequency_settings(settings: &FrequencySettings) -> Result<FrequencySetti
         n31: settings.n31 - 1,
         n32: settings.n32 - 1,
         bwsel: settings.bwsel,
-        crystal_ref: settings.crystal_ref
+        crystal_as_ckin2: settings.crystal_as_ckin2
     };
     Ok(r)
 }
@@ -219,18 +219,15 @@ pub fn bypass(i2c: &mut I2c, input: Input, timer: &mut GlobalTimer) -> Result<()
     Ok(())
 }
 
-pub fn setup(i2c: &mut I2c, settings: &FrequencySettings, ext_input: Input, timer: &mut GlobalTimer) -> Result<()> {
+pub fn setup(i2c: &mut I2c, settings: &FrequencySettings, input: Input, timer: &mut GlobalTimer) -> Result<()> {
     let s = map_frequency_settings(settings)?;
-
-    // FREE_RUN=1 routes XA/XB to CKIN2.
-    let input = if settings.crystal_ref { Input::Ckin2 } else { ext_input };
     let cksel_reg = match input {
         Input::Ckin1 => 0b00,
         Input::Ckin2 => 0b01,
     };
 
     init(i2c, timer)?;
-    if settings.crystal_ref {
+    if settings.crystal_as_ckin2 {
         rmw(i2c, 0,   |v| v | 0x40)?;                     // FREE_RUN=1
     }
     rmw(i2c, 2,   |v| (v & 0x0f) | (s.bwsel << 4))?;

src/runtime/src/rtio_clocking.rs

@@ -121,9 +121,10 @@ const SI5324_EXT_INPUT: si5324::Input = si5324::Input::Ckin1;
 
 #[cfg(has_si5324)]
 fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
-    let si5324_settings = match clk {
+    let (si5324_settings, si5324_ref_input) = match clk {
         RtioClock::Ext0_Synth0_10to125 => { // 125 MHz output from 10 MHz CLKINx reference, 504 Hz BW
             info!("using 10MHz reference to make 125MHz RTIO clock with PLL");
+            (
                 si5324::FrequencySettings {
                     n1_hs  : 10,
                     nc1_ls : 4,
@@ -132,11 +133,14 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
                     n31    : 6,
                     n32    : 6,
                     bwsel  : 4,
-                crystal_ref: false
+                    crystal_as_ckin2: false
-            }
+                },
+                SI5324_EXT_INPUT
+            )
         },
         RtioClock::Ext0_Synth0_100to125 => { // 125MHz output, from 100MHz CLKINx reference, 586 Hz loop bandwidth
             info!("using 100MHz reference to make 125MHz RTIO clock with PLL");
+            (
                 si5324::FrequencySettings {
                     n1_hs  : 10,
                     nc1_ls : 4,
@@ -145,11 +149,14 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
                     n31    : 52,
                     n32    : 52,
                     bwsel  : 4,
-                crystal_ref: false
+                    crystal_as_ckin2: false
-            }
+                },
+                SI5324_EXT_INPUT
+            )
         },
         RtioClock::Ext0_Synth0_125to125 => { // 125MHz output, from 125MHz CLKINx reference, 606 Hz loop bandwidth
             info!("using 125MHz reference to make 125MHz RTIO clock with PLL");
+            (
                 si5324::FrequencySettings {
                     n1_hs  : 5,
                     nc1_ls : 8,
@@ -158,11 +165,14 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
                     n31    : 63,
                     n32    : 63,
                     bwsel  : 4,
-                crystal_ref: false
+                    crystal_as_ckin2: false
-            }
+                },
+                SI5324_EXT_INPUT
+            )
         },
         RtioClock::Int_150 => { // 150MHz output, from crystal
             info!("using internal 150MHz RTIO clock");
+            (
                 si5324::FrequencySettings {
                     n1_hs  : 9,
                     nc1_ls : 4,
@@ -171,11 +181,14 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
                     n31    : 7139,
                     n32    : 7139,
                     bwsel  : 3,
-                crystal_ref: true
+                    crystal_as_ckin2: true
-            }
+                },
+                si5324::Input::Ckin2
+            )
         },
         RtioClock::Int_100 => { // 100MHz output, from crystal
             info!("using internal 100MHz RTIO clock");
+            (
                 si5324::FrequencySettings {
                     n1_hs  : 9,
                     nc1_ls : 6,
@@ -184,11 +197,14 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
                     n31    : 7139,
                     n32    : 7139,
                     bwsel  : 3,
-                crystal_ref: true
+                    crystal_as_ckin2: true
-            }
+                },
+                si5324::Input::Ckin2
+            )
         },
         RtioClock::Int_125 => { // 125MHz output, from crystal, 7 Hz
             info!("using internal 125MHz RTIO clock");
+            (
                 si5324::FrequencySettings {
                     n1_hs  : 10,
                     nc1_ls : 4,
@@ -197,11 +213,14 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
                     n31    : 4565,
                     n32    : 4565,
                     bwsel  : 4,
-                crystal_ref: true
+                    crystal_as_ckin2: true
-            }
+                },
-        }
+                si5324::Input::Ckin2
-        _ => { // 125MHz output like above, default (if chosen option is not supported)
+            )
-            warn!("rtio_clock setting '{:?}' is not supported. Falling back to default internal 125MHz RTIO clock.", clk);
+        },
+        _ => { // same setting  as Int_125, but fallback to default
+            warn!("rtio_clock setting '{:?}' is unsupported. Falling back to default internal 125MHz RTIO clock.", clk);
+            (
                 si5324::FrequencySettings {
                     n1_hs  : 10,
                     nc1_ls : 4,
@@ -210,11 +229,13 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
                     n31    : 4565,
                     n32    : 4565,
                     bwsel  : 4,
-                crystal_ref: true
+                    crystal_as_ckin2: true
-            }
+                },
+                si5324::Input::Ckin2
+            )
         }
     };
-    si5324::setup(i2c, &si5324_settings, SI5324_EXT_INPUT, timer).expect("cannot initialize Si5324");
+    si5324::setup(i2c, &si5324_settings, si5324_ref_input, timer).expect("cannot initialize Si5324");
 }
 
 pub fn init(timer: &mut GlobalTimer, cfg: &Config) {

src/satman/src/main.rs

@@ -428,7 +428,7 @@ const SI5324_SETTINGS: si5324::FrequencySettings
     n31    : 63,
     n32    : 63,
     bwsel  : 4,
-    crystal_ref: true
+    crystal_as_ckin2: true
 };
 
 #[cfg(all(has_si5324, rtio_frequency = "100.0"))]
@@ -441,7 +441,7 @@ const SI5324_SETTINGS: si5324::FrequencySettings
     n31    : 50,
     n32    : 50,
     bwsel  : 4,
-    crystal_ref: true
+    crystal_as_ckin2: true
 };
 
 static mut LOG_BUFFER: [u8; 1<<17] = [0; 1<<17];