forked from M-Labs/artiq-zynq
fix typos
This commit is contained in:
parent
2d58193930
commit
407e18a6a0
|
@ -90,7 +90,7 @@ impl KernelImage {
|
||||||
|
|
||||||
pub unsafe fn exec(&mut self) {
|
pub unsafe fn exec(&mut self) {
|
||||||
// Flush data cache entries for the image in DDR, including
|
// Flush data cache entries for the image in DDR, including
|
||||||
// Memory/Instruction Symchronization Barriers
|
// Memory/Instruction Synchronization Barriers
|
||||||
dcci_slice(self.library.image.data);
|
dcci_slice(self.library.image.data);
|
||||||
|
|
||||||
(mem::transmute::<u32, fn()>(self.__modinit__))();
|
(mem::transmute::<u32, fn()>(self.__modinit__))();
|
||||||
|
|
|
@ -53,7 +53,7 @@ pub fn main_core0() {
|
||||||
error!("decompression failed");
|
error!("decompression failed");
|
||||||
} else {
|
} else {
|
||||||
// Flush data cache entries for all of DDR, including
|
// Flush data cache entries for all of DDR, including
|
||||||
// Memory/Instruction Symchronization Barriers
|
// Memory/Instruction Synchronization Barriers
|
||||||
dcci_slice(unsafe {
|
dcci_slice(unsafe {
|
||||||
core::slice::from_raw_parts(ddr.ptr::<u8>(), ddr.size())
|
core::slice::from_raw_parts(ddr.ptr::<u8>(), ddr.size())
|
||||||
});
|
});
|
||||||
|
|
Loading…
Reference in New Issue