From 21135c6a4193344fec474c547cb64113a9a74718 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 20 Jul 2020 19:51:22 +0800
Subject: [PATCH] analyzer: report AXI bus errors

---
 src/gateware/analyzer.py    |  6 ++++++
 src/runtime/src/analyzer.rs | 14 +++++++++++---
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/gateware/analyzer.py b/src/gateware/analyzer.py
index 1247f844..afcb922f 100644
--- a/src/gateware/analyzer.py
+++ b/src/gateware/analyzer.py
@@ -22,6 +22,7 @@ class AXIDMAWriter(Module, AutoCSR):
         self.base_address = CSRStorage(aw, alignment_bits=alignment_bits)
         self.last_address = CSRStorage(aw, alignment_bits=alignment_bits)
         self.byte_count = CSRStatus(32)  # only read when shut down
+        self.bus_error = CSRStatus()
 
         self.make_request = Signal()
         self.sink = stream.Endpoint([("data", dw)])
@@ -82,6 +83,11 @@ class AXIDMAWriter(Module, AutoCSR):
         ]
 
         self.comb += membus.b.ready.eq(1)
+        self.sync += [
+            If(self.reset.re, self.bus_error.status.eq(0)),
+            If(membus.b.valid & membus.b.ready & (membus.b.resp != axi.Response.okay),
+                self.bus_error.status.eq(1))
+        ]
 
 
 class Analyzer(Module, AutoCSR):
diff --git a/src/runtime/src/analyzer.rs b/src/runtime/src/analyzer.rs
index 3db7f9b3..ed082e0c 100644
--- a/src/runtime/src/analyzer.rs
+++ b/src/runtime/src/analyzer.rs
@@ -44,7 +44,7 @@ fn disarm() {
 struct Header {
     sent_bytes: u32,
     total_byte_count: u64,
-    overflow_occurred: bool,
+    error_occurred: bool,
     log_channel: u8,
     dds_onehot_sel: bool
 }
@@ -52,7 +52,7 @@ struct Header {
 async fn write_header(stream: &mut TcpStream, header: &Header) -> Result<(), Error> {
     write_i32(stream, header.sent_bytes as i32).await?;
     write_i64(stream, header.total_byte_count as i64).await?;
-    write_i8(stream, header.overflow_occurred as i8).await?;
+    write_i8(stream, header.error_occurred as i8).await?;
     write_i8(stream, header.log_channel as i8).await?;
     write_i8(stream, header.dds_onehot_sel as i8).await?;
     Ok(())
@@ -63,14 +63,22 @@ async fn handle_connection(stream: &mut TcpStream) -> Result<(), Error> {
 
     let data = unsafe { &BUFFER.data[..] };
     let overflow_occurred = unsafe { pl::csr::rtio_analyzer::message_encoder_overflow_read() != 0 };
+    let bus_error_occurred = unsafe { pl::csr::rtio_analyzer::dma_bus_error_read() != 0 };
     let total_byte_count = unsafe { pl::csr::rtio_analyzer::dma_byte_count_read() as u64 };
     let pointer = (total_byte_count % BUFFER_SIZE as u64) as usize;
     let wraparound = total_byte_count >= BUFFER_SIZE as u64;
 
+    if overflow_occurred {
+        warn!("overflow occured");
+    }
+    if bus_error_occurred {
+        warn!("bus error occured");
+    }
+
     let header = Header {
         total_byte_count: total_byte_count,
         sent_bytes: if wraparound { BUFFER_SIZE as u32 } else { total_byte_count as u32 },
-        overflow_occurred: overflow_occurred,
+        error_occurred: overflow_occurred | bus_error_occurred,
         log_channel: pl::csr::CONFIG_RTIO_LOG_CHANNEL as u8,
         dds_onehot_sel: true  // kept for backward compatibility of analyzer dumps
     };