David Mak derppening
  • Joined on 2023-08-31
derppening pushed to llvm-new-pass-manager at M-Labs/nac3 2023-09-18 11:29:47 +08:00
d5fb0ddfd9 meta: Allow specifying compiler arguments for check_demos
14b9869cd1 artiq: Specify target CPU when creating LLVM target options
1e6a4e4f59 standalone: Add command line flags for target properties
04e0e4c66b core: Switch to LLVM New Pass Manager
Compare 4 commits »
derppening pushed to llvm-new-pass-manager at M-Labs/nac3 2023-09-18 11:26:06 +08:00
50703e515d meta: Allow specifying compiler arguments for check_demos
478465e38f artiq: Specify target CPU when creating LLVM target options
a324032a9d standalone: Add command line flags for target properties
f0bf40d8b7 core: Switch to LLVM New Pass Manager
Compare 4 commits »
derppening commented on pull request M-Labs/nac3#319 2023-09-18 09:56:18 +08:00
Use LLVM New Pass Manager

v7: Rebased against master, removed legacy_pm configuration

derppening pushed to llvm-new-pass-manager at M-Labs/nac3 2023-09-18 09:55:46 +08:00
443f7d37e1 meta: Allow specifying compiler arguments for check_demos
f2e57dd1d9 artiq: Specify target CPU when creating LLVM target options
1bd82b24e6 standalone: Add command line flags for target properties
d3b326846e core: Switch to LLVM New Pass Manager
676d07657a core: Add target field to CodeGenLLVMOptions
Compare 7 commits »
derppening commented on issue M-Labs/nac3#315 2023-09-15 14:45:06 +08:00
Incorrect Value when assigning list slices using OptimizationLevel::None

So I found a much simpler way of reproducing the issue:

@extern
def output_int32_list(x: list[int32]):
	...

def run() -> int32:
	bl = [True, False]
	output_int32_list([int32(b)
derppening created pull request M-Labs/nac3#320 2023-09-15 10:31:55 +08:00
Update to Rust Edition 2021
derppening created branch rust-edition-2021 in M-Labs/nac3 2023-09-15 10:25:55 +08:00
derppening pushed to rust-edition-2021 at M-Labs/nac3 2023-09-15 10:25:55 +08:00
eb63f2ad48 meta: Update to Rust Edition 2021
derppening commented on pull request M-Labs/nac3#319 2023-09-15 10:16:54 +08:00
Use LLVM New Pass Manager

In a sense it is probably not necessary to expose the legacy PM to users of ARTIQ, so this change is removed until someone else thinks it's necessary.

derppening pushed to llvm-new-pass-manager at M-Labs/nac3 2023-09-15 10:16:52 +08:00
47c507453c meta: Allow specifying compiler arguments for check_demos
6c2e27c2d9 artiq: Specify target CPU when creating LLVM target options
a033a869cf standalone: Add command line flags for target properties
3c2696c15c core: Switch to LLVM New Pass Manager
Compare 4 commits »
derppening commented on pull request M-Labs/nac3#319 2023-09-15 10:14:04 +08:00
Use LLVM New Pass Manager

v4: Fixed incorrect CPU name for RISC-V.

derppening pushed to llvm-new-pass-manager at M-Labs/nac3 2023-09-15 10:12:28 +08:00
96f940f16c meta: Allow specifying compiler arguments for check_demos
6f67d4cf8f artiq: Specify target CPU when creating LLVM target options
Compare 2 commits »
derppening commented on pull request M-Labs/nac3#319 2023-09-15 09:58:25 +08:00
Use LLVM New Pass Manager

Mostly to diagnose problems that occur only using the Legacy PM, e.g. #315.

derppening commented on pull request M-Labs/nac3#319 2023-09-14 15:38:29 +08:00
Use LLVM New Pass Manager

v4: Changed implementation to keep both legacy and new PMs for testing, refactored codegen test cases to test both legacy and new PMs.

Ready for review.

derppening pushed to llvm-new-pass-manager at M-Labs/nac3 2023-09-14 15:36:32 +08:00
667ebc699c meta: Allow specifying compiler arguments for check_demos
f63611dc87 artiq: Specify target CPU when creating LLVM target options
c86b6e22d6 standalone: Add command line flags for target properties
5722f3397e core: Switch to LLVM New Pass Manager
70cb0bd898 core: Add legacy_pm and target fields to CodeGenLLVMOptions
Compare 5 commits »
derppening commented on pull request M-Labs/nac3#319 2023-09-14 14:16:13 +08:00
Use LLVM New Pass Manager

On second thought - I think it's better if I implement a flag which can toggle between the new and old pass managers, since there are still outstanding bugs we need to fix when building using the…

derppening commented on pull request M-Labs/nac3#319 2023-09-14 14:13:05 +08:00
Use LLVM New Pass Manager

v3: Rebased against master, added target CPU name to TargetMachine creation, and updated check_demos.sh script to allow arguments to the compiler.

derppening pushed to llvm-new-pass-manager at M-Labs/nac3 2023-09-14 14:11:49 +08:00
6f9c464230 meta: Allow specifying compiler arguments for check_demos
75ae582565 artiq: Specify target CPU when creating LLVM target options
e86fae9941 standalone: Add command line flags for target properties
578fb56a78 core: Switch to LLVM New Pass Manager
ad834d2237 core: Add target field to CodeGenLLVMOptions
Compare 9 commits »
derppening commented on issue M-Labs/nac3#315 2023-09-12 19:04:36 +08:00
Incorrect Value when assigning list slices using OptimizationLevel::None

This issue seemed to have gone away using the new pass manager. I guess more investigation is needed to determine whether this is a LLVM bug or NAC3 bug.

derppening commented on pull request M-Labs/nac3#319 2023-09-12 18:51:42 +08:00
Use LLVM New Pass Manager

v2: Rebased against master.