Denis Ovchinnikov den512
0 Followers · 0 Following
  • Joined on 2023-05-29
Repositories
2
 Projects Packages Code Public Activity Starred Repositories
den512 commented on issue M-Labs/artiq-zynq#240 2023-06-29 10:38:33 +08:00
Link RX remains UP despite the removal of the SFP module.

Ok. I will look for what is wrong.

den512 commented on issue M-Labs/artiq-zynq#240 2023-06-29 10:29:09 +08:00
Link RX remains UP despite the removal of the SFP module.

In rare cases, BruteforceClockAligner does not find any errors when removing an SFP module, so everything continues to work. Perhaps it is data from the transceiver that looks like good data. For…

den512 opened issue M-Labs/artiq-zynq#240 2023-06-27 15:33:08 +08:00
Link RX remains UP despite the removal of the SFP module.
den512 commented on pull request M-Labs/artiq-zynq#239 2023-06-27 13:56:46 +08:00
kasli_soc: enable clock buffer IBUFDS_GTE2 after system clock domain reset

System clock switching issue will fix only with artiq PR "kasli-soc: change initialization of GTX transceivers. #2122"

den512 pushed to sys_clk_issue_1 at den512/artiq-zynq 2023-06-27 13:46:29 +08:00
0d97eeb56a kasli_soc: enable clock buffer after system clock domain reset
den512 created pull request M-Labs/artiq-zynq#239 2023-06-27 13:00:08 +08:00
kasli_soc: enable clock buffer IBUFDS_GTE2 after system clock domain reset
den512 deleted branch sys_clk_issue from den512/artiq-zynq 2023-06-27 12:51:26 +08:00
den512 created branch sys_clk_issue_1 in den512/artiq-zynq 2023-06-27 12:49:04 +08:00
den512 pushed to sys_clk_issue_1 at den512/artiq-zynq 2023-06-27 12:49:04 +08:00
af0c151166 kasli_soc: enable clock buffer after system clock domain reset
den512 pushed to master at den512/artiq-zynq 2023-06-27 12:11:38 +08:00
den512 created branch sys_clk_issue in den512/artiq-zynq 2023-06-27 12:09:42 +08:00
den512 pushed to sys_clk_issue at den512/artiq-zynq 2023-06-27 12:09:42 +08:00
den512 pushed to master at den512/artiq-zynq 2023-06-27 11:29:32 +08:00
c6acc499b1 kasli_soc: enable clock buffer after system clock domain reset
den512 pushed to master at den512/artiq-zynq 2023-06-27 11:07:06 +08:00
ccfe15ee8d kasli_soc: enable clock buffer after system clock domain reset
den512 pushed to master at den512/artiq-zynq 2023-06-27 10:57:02 +08:00
adff99a6ef kasli_soc: enable clock buffer after system clock domain reset
den512 pushed to master at den512/assembly 2023-06-21 10:46:53 +08:00
a219243997 Add instruction for Kasli-SOC
den512 commented on pull request M-Labs/artiq-zynq#237 2023-06-20 14:59:29 +08:00
kasli_soc: add SFP0..3 LED indication

I removed this additional module.

den512 pushed to master at den512/artiq-zynq 2023-06-20 14:53:34 +08:00
8bba04b921 kasli_soc: add SFP0..3 LED indication
den512 created pull request sinara-hw/assembly#3 2023-06-17 13:55:33 +08:00
WIP. add kasli_soc POR and SD jumpers
den512 pushed to master at den512/assembly 2023-06-17 13:48:29 +08:00
d4a2d3c544 resize picture of kasli_soc