forked from M-Labs/artiq-zynq
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3 Commits
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f1ee3a7584
Author | SHA1 | Date | |
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f1ee3a7584 | |||
165b1400ab | |||
63594d7e3d |
22
flake.lock
generated
22
flake.lock
generated
@ -11,11 +11,11 @@
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"src-pythonparser": "src-pythonparser"
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},
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"locked": {
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"lastModified": 1685181798,
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"narHash": "sha256-pUxlwhxoIMfMkgbVJe3DFBjR5v784RGzfNdBtRKsuy4=",
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"lastModified": 1685418630,
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"narHash": "sha256-Sbt2LoIBy01ttHmHsgwMgTLFoV9fgKrYL8RpE4hykog=",
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"ref": "refs/heads/master",
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"rev": "ef2cc2cc125f0aa5fe6e92d87865b0b0bf1dae4c",
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"revCount": 8365,
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"rev": "0941d3a29a61d250ff02ddfafefd2c9e8c9350e3",
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"revCount": 8368,
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"type": "git",
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"url": "https://github.com/m-labs/artiq.git"
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},
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@ -115,11 +115,11 @@
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},
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"nixpkgs": {
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"locked": {
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"lastModified": 1685004253,
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"narHash": "sha256-AbVL1nN/TDicUQ5wXZ8xdLERxz/eJr7+o8lqkIOVuaE=",
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"lastModified": 1685356226,
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"narHash": "sha256-f2clSOdqi0SvY1WSgbnl2YgCZmoCXOxeUjYeXp8p2zI=",
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"owner": "NixOS",
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"repo": "nixpkgs",
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"rev": "3e01645c40b92d29f3ae76344a6d654986a91a91",
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"rev": "0f7f5ca1cdec8dea85bb4fa60378258171d019ad",
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"type": "github"
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},
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"original": {
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@ -176,11 +176,11 @@
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"src-misoc": {
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"flake": false,
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"locked": {
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"lastModified": 1685174995,
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"narHash": "sha256-90UwWt9/TAaFAoYDpiIzHXqMWYfftlps8sodv/Gf07c=",
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"lastModified": 1685415268,
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"narHash": "sha256-g4+yeSV+HtWjcllM5wk4vNBUVCXtDOzUSKhxXPT7Fyc=",
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"ref": "refs/heads/master",
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"rev": "d83499b318e8ef021b12e2df261707a165eb3afa",
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"revCount": 2439,
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"rev": "6d48ce77b6746d3226a682790fbc95b90340986e",
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"revCount": 2440,
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"submodules": true,
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"type": "git",
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"url": "https://github.com/m-labs/misoc.git"
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@ -71,9 +71,12 @@ class GTP125BootstrapClock(Module):
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platform.add_period_constraint(bootstrap_125.p, 8.0)
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self.specials += [
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Instance("IBUFDS_GTE2",
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p_CLKSWING_CFG="0b11",
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i_CEB=0,
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i_I=bootstrap_125.p, i_IB=bootstrap_125.n, o_O=bootstrap_se),
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i_I=bootstrap_125.p, i_IB=bootstrap_125.n,
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o_O=bootstrap_se,
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p_CLKCM_CFG="TRUE",
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p_CLKRCV_TRST="TRUE",
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p_CLKSWING_CFG=3),
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Instance("BUFG", i_I=bootstrap_se, o_O=self.cd_bootstrap.clk)
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]
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@ -149,9 +149,9 @@ class ZC706(SoCCore):
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i_CEB=0,
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i_I=si5324_out.p, i_IB=si5324_out.n,
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o_O=cdr_clk,
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p_CLKCM_CFG="0b1",
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p_CLKRCV_TRST="0b1",
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p_CLKSWING_CFG="0b11"),
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p_CLKCM_CFG="TRUE",
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p_CLKRCV_TRST="TRUE",
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p_CLKSWING_CFG=3),
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Instance("BUFG", i_I=cdr_clk, o_O=cdr_clk_buf)
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]
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self.rustc_cfg["has_si5324"] = None
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@ -1,4 +1,5 @@
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use core::cmp::min;
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use libboard_artiq::{drtioaux_proto::ANALYZER_MAX_SIZE, pl::csr};
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use libcortex_a9::cache;
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@ -35,7 +36,7 @@ pub struct Analyzer {
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// necessary for keeping track of sent data
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data_len: usize,
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sent_bytes: usize,
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data_pointer: usize
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data_pointer: usize,
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}
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pub struct Header {
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@ -62,7 +63,7 @@ impl Analyzer {
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Analyzer {
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data_len: 0,
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sent_bytes: 0,
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data_pointer: 0
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data_pointer: 0,
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}
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}
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@ -106,8 +107,8 @@ impl Analyzer {
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let last = self.sent_bytes + len == self.data_len;
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if i + len >= BUFFER_SIZE {
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data_slice[..(BUFFER_SIZE-i)].clone_from_slice(&data[i..BUFFER_SIZE]);
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data_slice[(BUFFER_SIZE-i)..len].clone_from_slice(&data[..(i + len) % BUFFER_SIZE]);
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data_slice[..(BUFFER_SIZE - i)].clone_from_slice(&data[i..BUFFER_SIZE]);
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data_slice[(BUFFER_SIZE - i)..len].clone_from_slice(&data[..(i + len) % BUFFER_SIZE]);
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} else {
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data_slice[..len].clone_from_slice(&data[i..i + len]);
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}
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