bb65074254
updated zynq-rs and IRQ handling
2021-01-28 12:56:54 +08:00
c2a6fb72f7
updated zynq-rs dependency
2021-01-26 12:38:09 +08:00
faa335461d
runtime: modified protocols to use device endian
2021-01-22 13:36:38 +08:00
be01fbd943
runtime/irq: use assembly for naked IRQ handler
...
and solves the bug introduced due to stack unwinding...
2021-01-18 17:08:04 +08:00
9e8b554c6d
runtime/kernel/core1: use correct ABI
2021-01-18 16:43:30 +08:00
b4ff6dda24
runtime: use naked function for IRQ
...
non-naked IRQ would somehow trigger interrupts after several kernel
restarts, investigating
2021-01-18 10:38:50 +08:00
35204d4716
fixed new compiler warnings
2021-01-15 17:55:58 +08:00
93493397ae
updated zynq-rs dependency
2021-01-15 17:55:47 +08:00
e5207b86db
update rust dependencies
2020-12-24 01:17:24 +01:00
28fe61b061
runtime: add feature target_kasli_soc
2020-12-23 20:11:43 +01:00
ce55e2ed23
update rust dependencies
2020-12-23 17:02:19 +01:00
cb9dae1951
update rust dependencies
2020-11-20 17:54:09 +01:00
07b425a67a
fix other compilation warnings
2020-11-16 14:57:20 +08:00
57ae8619f8
remove unnecessary no_mangle
...
no_mangle does nothing on extern items as per https://github.com/rust-lang/rust/issues/78989#issuecomment-726163973
Closes #115
2020-11-16 14:51:30 +08:00
32048ead20
gateware/coraz7: remove unused VARIANTS
2020-11-14 02:24:29 +01:00
113c8eb0b8
add coraz7 + redpitaya targets
2020-11-13 20:17:18 +01:00
9259cffeb2
i2c: add stubs for targets without i2c
2020-11-12 15:26:06 +01:00
David Nadlinger
7c336f7770
kernel/api: Add additional binary libm functions
...
Also factored out (f64, f64) -> f64 libm wrappers into
a macro, similar to the unary ones.
2020-11-11 01:24:44 +01:00
291a782db0
fix compiler warning
...
Feature is now stable.
2020-11-06 12:22:34 +08:00
479e6afd12
update Rust dependencies
2020-11-06 12:20:48 +08:00
7dbffadf08
mgmt: implemented config write
2020-11-04 21:16:47 +08:00
b7155c9ded
Makefile: cleanup
2020-10-14 13:06:15 +08:00
5c62d6a141
update dependencies, disable custom compiler_builtins ( #113 )
2020-10-13 21:51:40 +08:00
eab839aed0
follow changes in zynq-rs
2020-10-13 19:12:55 +08:00
a374d8a02f
runtime/kernel/dma: reduced replay overhead
...
We can just flush the cache once when we get the handle, instead of
everytime before replay.
2020-09-09 21:25:03 +08:00
03d9827a5a
acpki: working
2020-09-09 21:24:49 +08:00
86b9045417
use liconfig, libcoreio, szl from zynq-rs
2020-09-09 18:44:12 +08:00
7e26a87aed
fix previous commit
2020-09-09 18:12:39 +08:00
a277e89b3a
Makefile: fix runtime.bin target
2020-09-09 17:01:14 +08:00
1e742cc390
updated zynq-rs dependency
2020-09-07 16:18:50 +08:00
2fe73505c8
improve i2c error reporting
2020-09-06 00:38:28 +08:00
36d8ffec3b
expose i2c to kernels
2020-09-06 00:11:19 +08:00
91ed035bef
makefile: fix szl rebuild ( #108 )
2020-09-06 00:10:44 +08:00
d5a91a7697
updated zynq-rs for more CPU options
2020-09-04 16:43:07 +08:00
5da76f2abb
enabled cpu program flow prediction
2020-09-04 13:25:17 +08:00
5e4bf8bbf7
runtime/comms: Faster RPC alloc
...
We do busy polling for some time before doing await, for small
allocations we could avoid the context switching and reduce the latency.
2020-09-03 16:58:44 +08:00
cdc8ad8aee
runtime/kernel/control: fixed memory leak
2020-09-03 16:51:51 +08:00
805f1d4eff
runtime: increased heap size
2020-09-02 10:15:52 +08:00
ae07c05db4
runtime: optimize for speed and fix deadlock
...
The previous method of taking the channel could cause deadlock, we now
use semaphore to signal if the channel is available instead of busy
polling the mutex.
2020-09-02 10:15:52 +08:00
b0706f470d
runtime: set default log level to Info
2020-09-01 17:11:21 +08:00
ccf8ae5b5d
szl: implemented #96
...
SZL no longer do self-extraction for runtime binary, it would boot from
SD/ethernet depending on the boot mode settings.
This allows a larger runtime binary, so we can optimize for speed in the
runtime firmware for better performance, and allow more features to be
added later.
2020-09-01 15:57:20 +08:00
050b2457a4
runtime/main: removed bitstream loading code
2020-09-01 15:43:54 +08:00
eb78e4e2da
libconfig: refactored load_pl into bootgen
...
Now allows loading firmware.
2020-09-01 14:48:19 +08:00
afecc83ecf
libconfig/net_settings: made ipv6 optional feature
...
This is to prepare for szl, which cannot use ipv6 due to memory
limitation.
2020-09-01 14:48:19 +08:00
04437e876c
libconfig/load_pl: added alignment for devc buffer
...
According to the TRM, the buffer should be 64B aligned.
Without the alignment would cause failure for the DMA transaction.
It seems that the allocator would give some alignment, but to be more
correct we should specify that with the alloc interface.
2020-09-01 14:48:19 +08:00
42f94487cf
split config code into libconfig
2020-09-01 14:48:09 +08:00
d474cf58a5
runtime/rpc: optimizations for list and arrays
...
Requires https://github.com/m-labs/artiq/pull/1510
This is the commit producing the result in the table.
2020-08-26 13:47:41 +08:00
71427f8ec8
runtime/proto_async: simplify functions
...
And the compiler can use its intrinsic for byte rev.
2020-08-26 13:46:51 +08:00
538c012bc4
use new repos location for compiler-builtins-zynq
2020-08-25 16:24:30 +08:00
ba162b3997
Fix pure build
2020-08-25 14:51:39 +08:00
