Commit Graph

75 Commits

Author SHA1 Message Date
f3310324d7 update dependencies 2022-08-26 17:37:27 +08:00
0812f22423 update dependencies 2022-07-20 17:34:26 +08:00
596edb480c cargo: update zynq-rs 2022-05-25 10:37:38 +08:00
14f7778732 update libconfig features 2022-04-08 10:30:21 +08:00
7502f3a765 update dependencies 2022-03-10 17:25:40 +08:00
accac99f48 updated zynq-rs with pca9547 support (#165)
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2022-02-11 13:53:58 +08:00
acaf388dbb eh_artiq: handle catch clauses appropriately 2022-01-06 13:41:47 +08:00
2ed2ffe417 update dependencies 2021-08-09 15:16:54 +08:00
dcb6129b0e update dependencies 2021-07-05 13:56:40 +08:00
f25e261bdd update dependencies 2021-06-25 17:12:47 +08:00
8c8a5d53b9 update dependencies 2021-06-19 22:51:25 +08:00
1b474d2dd4 update dependencies 2021-05-29 14:20:23 +08:00
bfd8343876 update zynq-rs and dependencies (smoltcp 0.7.0) 2021-02-08 03:24:18 +01:00
bb65074254 updated zynq-rs and IRQ handling 2021-01-28 12:56:54 +08:00
c2a6fb72f7 updated zynq-rs dependency 2021-01-26 12:38:09 +08:00
93493397ae updated zynq-rs dependency 2021-01-15 17:55:47 +08:00
e5207b86db update rust dependencies 2020-12-24 01:17:24 +01:00
ce55e2ed23 update rust dependencies 2020-12-23 17:02:19 +01:00
cb9dae1951 update rust dependencies 2020-11-20 17:54:09 +01:00
113c8eb0b8 add coraz7 + redpitaya targets 2020-11-13 20:17:18 +01:00
479e6afd12 update Rust dependencies 2020-11-06 12:20:48 +08:00
7dbffadf08 mgmt: implemented config write 2020-11-04 21:16:47 +08:00
5c62d6a141 update dependencies, disable custom compiler_builtins (#113) 2020-10-13 21:51:40 +08:00
eab839aed0 follow changes in zynq-rs 2020-10-13 19:12:55 +08:00
86b9045417 use liconfig, libcoreio, szl from zynq-rs 2020-09-09 18:44:12 +08:00
1e742cc390 updated zynq-rs dependency 2020-09-07 16:18:50 +08:00
d5a91a7697 updated zynq-rs for more CPU options 2020-09-04 16:43:07 +08:00
5da76f2abb enabled cpu program flow prediction 2020-09-04 13:25:17 +08:00
ae07c05db4 runtime: optimize for speed and fix deadlock
The previous method of taking the channel could cause deadlock, we now
use semaphore to signal if the channel is available instead of busy
polling the mutex.
2020-09-02 10:15:52 +08:00
ccf8ae5b5d szl: implemented #96
SZL no longer do self-extraction for runtime binary, it would boot from
SD/ethernet depending on the boot mode settings.
This allows a larger runtime binary, so we can optimize for speed in the
runtime firmware for better performance, and allow more features to be
added later.
2020-09-01 15:57:20 +08:00
afecc83ecf libconfig/net_settings: made ipv6 optional feature
This is to prepare for szl, which cannot use ipv6 due to memory
limitation.
2020-09-01 14:48:19 +08:00
42f94487cf split config code into libconfig 2020-09-01 14:48:09 +08:00
538c012bc4 use new repos location for compiler-builtins-zynq 2020-08-25 16:24:30 +08:00
ba162b3997 Fix pure build 2020-08-25 14:51:39 +08:00
e592efb2b8 enabled L2 cache and optimized ethernet 2020-08-25 14:51:39 +08:00
760f46a115 update dependencies 2020-08-17 19:17:42 +02:00
3a8a025d5f update dependencies, zc706 -> zynq-rs 2020-08-06 20:33:23 +08:00
e7752a3d6d runtime/kernel: fixes core0 memory leak.
Fixes #85
2020-08-06 09:39:49 +08:00
b915176b29 runtime: implement acpki RTIO output 2020-08-04 17:32:43 +08:00
6a4d871917 runtime/irq: use spinlock functions instead of asm.
Closes #81
2020-08-04 14:40:02 +08:00
fa00ab211d Updated zc706 dependency and fixed compiler errors. 2020-08-04 10:15:57 +08:00
0310421085 RTIO DMA: Compiled but not working.
* Cache flush should be done before playback instead when getting the
  handler.
* `csr::rtio_dma::enable_read()` would loop forever, probably bug in the
  gateware.
2020-07-23 17:04:15 +08:00
536f50f122 update dependencies 2020-07-22 23:51:09 +02:00
e0560a2db9 expose libm functions to kernel 2020-07-21 13:50:33 +08:00
f5db0e06f4 update dependencies, use new libasync smoltcp recv API 2020-07-19 16:16:39 +08:00
92405ffe91 logger: changed from RefCell to Mutex. 2020-07-15 17:04:16 +08:00
62f39e2c08 mgmt: Implemented network log access. 2020-07-13 15:15:06 +08:00
bd7d58e239 add RTIO PLL and clock source selection 2020-07-08 19:58:13 +08:00
a8de572014 set up PL clocks 2020-07-07 19:40:32 +08:00
e6cf3e90d3 update zc706 2020-07-07 12:50:05 +08:00