5becf0af0a
runtime/kernel: fixed memory corruption for cache and DMA.
2020-08-06 10:29:31 +08:00
e7752a3d6d
runtime/kernel: fixes core0 memory leak.
...
Fixes #85
2020-08-06 09:39:49 +08:00
984bb08d27
Makefile: optimize
2020-08-05 19:14:18 +08:00
de2d7ecf48
typo
2020-08-05 18:52:08 +08:00
c85e85aa6d
runtime/logger: use blocking wait.
...
Fixes #84 using the first solution.
If the performance is considered too slow,
we can do the second option later.
2020-08-05 18:51:27 +08:00
4b6c5d5679
runtime/kernel: store DMA and cache buffer on core0.
...
Closes #77 .
2020-08-05 15:33:40 +08:00
72427dbebb
runtime: cleanup core_log
2020-08-05 00:40:54 +08:00
6d654de3d5
runtime: implement core_log
2020-08-04 23:27:51 +08:00
3092bfc21a
runtime: expose __aeabi_idivmod to kernel
2020-08-04 22:45:28 +08:00
b915176b29
runtime: implement acpki RTIO output
2020-08-04 17:32:43 +08:00
537f4968eb
acpki: add legacy i_status/o_status registers
2020-08-04 17:31:35 +08:00
62988a580e
acpki: update for combined RTIO channel/address
2020-08-04 17:28:15 +08:00
fc21fcc920
runtime/comms: removed sync_channel hack.
...
Fixes #80
2020-08-04 14:40:02 +08:00
6a4d871917
runtime/irq: use spinlock functions instead of asm.
...
Closes #81
2020-08-04 14:40:02 +08:00
8337c9173e
runtime: share rtio_log format function
2020-08-04 13:27:18 +08:00
1e20259c36
fix acpki selection
2020-08-04 13:26:45 +08:00
f8d4036451
add ACP kernel initiator
...
Based on work by Chris Ballance
https://github.com/m-labs/artiq/issues/1167#issuecomment-427188287
M-Labs/artiq-zynq#55
Work-in-progress, only gateware part and build system, untested.
2020-08-04 13:15:26 +08:00
c9bac028bf
dma: call rtio module to get time cursor position
...
More portable across RTIO implementations.
2020-08-04 13:14:00 +08:00
56e7cc822c
runtime/comms: limited concurrent connections to 1 only.
2020-08-04 10:31:03 +08:00
d58a3ef12c
runtime/comms: restart core1 before kernel load.
2020-08-04 10:17:19 +08:00
fa00ab211d
Updated zc706 dependency and fixed compiler errors.
2020-08-04 10:15:57 +08:00
7caee2bf88
improve DMA logging
2020-07-30 22:25:49 +08:00
2e7090a359
remove unused import
2020-07-30 22:07:44 +08:00
b388b529ad
dyld: remove KERNEL_EXIDX_START/END globals, move dl_unwind_find_exidx() into runtime::kernel::core1
...
Gitea issue #16
2020-07-27 19:56:06 +02:00
641204425e
dyld: obtain EXIDX offsets from section headers
...
Gitea issue #16
2020-07-27 01:58:42 +02:00
7f983a453d
implement core device cache
2020-07-25 17:04:40 +08:00
630dcc274e
fix compilation warning with new rustc
2020-07-25 12:15:50 +08:00
e64f59723c
dma: use const initializer for manager
2020-07-25 12:12:56 +08:00
26874030fc
retry RTIO PLL lock
2020-07-25 11:15:33 +08:00
0ce45b145e
kernel: proper type for static shared variables.
...
* Changed the KERNEL_CHANNEL_* to Mutex<T> with proper type, remove the
need for unsafe.
* Exposed a const pointer to KernelImage, with UnsafeCell holding
the library field for unbind with interior mutability.
2020-07-24 12:24:01 +08:00
0310421085
RTIO DMA: Compiled but not working.
...
* Cache flush should be done before playback instead when getting the
handler.
* `csr::rtio_dma::enable_read()` would loop forever, probably bug in the
gateware.
2020-07-23 17:04:15 +08:00
64dad88a32
Kernel exception: fixed top level finally. ( #70 )
...
Fixes #70 .
2020-07-23 14:09:15 +08:00
4846f2891b
use blocking timer api, update microseconds api
2020-07-22 23:58:55 +02:00
536f50f122
update dependencies
2020-07-22 23:51:09 +02:00
9b07468e50
add libm functions from legacy runtime
2020-07-21 22:58:56 +08:00
d11e3fdad8
runtime/mgmt: mgmt.rs consistency
...
Closes #67 .
2020-07-21 13:54:32 +08:00
e0560a2db9
expose libm functions to kernel
2020-07-21 13:50:33 +08:00
59cf2764ce
dma: report AXI bus error
2020-07-21 12:47:20 +08:00
21135c6a41
analyzer: report AXI bus errors
2020-07-20 19:51:22 +08:00
9a8f8e2d7b
szl: add startup banner
2020-07-20 19:51:09 +08:00
0b47ac75f0
comms,mgmt: log connections as soon as they arrive
2020-07-20 19:09:56 +08:00
8c60947291
moninj: better connection logging
2020-07-20 19:07:44 +08:00
4af29e8eca
comms: report error on incorrect connection start pattern
2020-07-20 19:07:12 +08:00
d65e893d1c
more conservative RTIO PLL reset timing
2020-07-20 14:19:13 +08:00
db2a8e7726
implement RTIO log
2020-07-20 14:10:46 +08:00
f5db0e06f4
update dependencies, use new libasync smoltcp recv API
2020-07-19 16:16:39 +08:00
3ec9788eb1
proto_async: always consume one byte in recv
2020-07-19 16:07:55 +08:00
523524c319
zc706: add RTIO log channels
2020-07-19 14:05:35 +08:00
6e75741aa3
analyzer: remove debug print
2020-07-16 18:37:15 +08:00
f69e41af5e
gateware: fix VADJ I/O standard conflict
2020-07-16 17:58:31 +08:00
6a361893c2
gateware: make LEDs common to all variants
...
Makes quick testing easier.
2020-07-16 17:36:27 +08:00
ae7ca22db9
dma: fix endianness issues
2020-07-16 17:27:08 +08:00
a9f725dd33
kernel: added error message after uncaught exception
2020-07-16 17:11:35 +08:00
caef2a9f84
runtime/panic: prevent nested panic and added core ID in panic msg.
2020-07-16 17:11:35 +08:00
16158acfa9
analyzer: close connection gracefully
2020-07-16 17:10:24 +08:00
10a12245a3
analyzer: fix endianness issue
2020-07-16 17:10:09 +08:00
84630d66e3
rpc: added #[repr(C)] for structs.
2020-07-16 15:48:17 +08:00
4457af7277
rpc: Fixed alignment problem.
...
Fixes issue #42 .
Previously there was no fix for the variable alignment.
We calculate the position of the variable based on the size
of the previous variable, so we could break the alignment requirement
for variables. For example, having a `i64` after `bool` could break
the alignment required for `i64` and trigger DataAbort or data
corruption.
However, this requires the same data layout and LLVM type for the
variables. If this cannot be maintained, this would break the alignment
on the other side of the RPC, either from host to kernel or kernel to
host.
2020-07-16 14:06:39 +08:00
2e10922715
analyzer: implement firmware part
2020-07-16 11:47:55 +08:00
b62fbce826
mgmt: log incoming connection
2020-07-16 11:36:26 +08:00
0c6db0d12c
analyzer: use 32-bit byte_count
2020-07-16 11:36:04 +08:00
36338ea3b2
Makefile: fix pl.rs dependencies
2020-07-16 11:35:40 +08:00
0b0ca8de49
analyzer: drive wid and wstrb
2020-07-15 23:11:19 +08:00
8e758ecc17
add RTIO analyzer core (untested)
2020-07-15 23:06:34 +08:00
b68cb137e5
dma: style
2020-07-15 23:06:14 +08:00
92405ffe91
logger: changed from RefCell to Mutex.
2020-07-15 17:04:16 +08:00
2568d62865
mgmt: fixed pull log
2020-07-15 16:05:00 +08:00
5149d37be9
szl: added cache flush and memory barriers.
...
Resolves #50 .
2020-07-14 17:02:42 +08:00
8e3574080c
core1: added cache flush and barriers.
2020-07-14 10:53:35 +08:00
49d93e20dd
dyld: add Image.rebind()
2020-07-14 01:31:54 +02:00
12ba867268
dma: fix and cleanup test
2020-07-13 18:58:08 +08:00
5c3c3c26b5
dma: fix inflight_cnt and eop generation
2020-07-13 18:51:55 +08:00
fa2d71615a
report async RTIO errors
2020-07-13 16:06:05 +08:00
b42ab0634b
complete RTIO exceptions
2020-07-13 15:47:34 +08:00
62f39e2c08
mgmt: Implemented network log access.
2020-07-13 15:15:06 +08:00
855b26aa19
Logger: ported log_buffer.
2020-07-13 14:59:56 +08:00
ea96cf96d3
dma: add simulation test (WIP)
2020-07-13 12:04:10 +08:00
10888cc6c6
dma: remove unneeded import
2020-07-13 10:42:02 +08:00
a7073edf79
add DMA core (untested)
2020-07-13 10:37:17 +08:00
e3ff21b1b5
create gateware folder
2020-07-11 17:49:54 +08:00
7aec419ed6
kernel: added core1 instruction cache flush
2020-07-10 17:21:55 +08:00
68d27ca2ee
comms: removed core1 restart
2020-07-10 17:21:55 +08:00
407e18a6a0
fix typos
2020-07-10 16:36:45 +08:00
2d58193930
Panic: single line backtrace for addr2line.
2020-07-10 12:26:28 +08:00
c935e450df
makefile: automate runtime dependencies
2020-07-09 09:41:45 +08:00
656e768f06
makefile: update dependencies
2020-07-09 09:31:36 +08:00
2c1773b91b
kernel: refactor main_core1 into KernelImage
2020-07-08 23:49:43 +02:00
b3d4590eec
kernel: split into {api,control,core1,rpc}
2020-07-08 23:49:32 +02:00
68045ce0c5
mark RTIO clock as asychronous to system clock
2020-07-08 20:37:53 +08:00
7ee67db8e3
use IOSERDES TTL
2020-07-08 20:02:46 +08:00
bd7d58e239
add RTIO PLL and clock source selection
2020-07-08 19:58:13 +08:00
6454315cd2
config: refactor and share
2020-07-08 19:24:26 +08:00
e263814546
Kernel: Added startup kernel
2020-07-08 15:54:50 +08:00
a8de572014
set up PL clocks
2020-07-07 19:40:32 +08:00
b13da96835
increase CSR bus width to 32 bits
...
Before:
Minimum interval for sustained TTL output switching ... 1.554e-06
After:
Minimum interval for sustained TTL output switching ... 5.17e-07
2020-07-07 17:22:07 +08:00
7bfe882710
eh_artiq: reduce verbosity
2020-07-07 17:21:28 +08:00
c071507ff8
RTIO: implemented exceptions
2020-07-07 16:26:33 +08:00
f1750cf8cd
Kernel: Fixed use-after-free
2020-07-07 15:51:12 +08:00
0f797284e2
SdReader: fixed write cache bug.
2020-07-07 14:02:13 +08:00
e6cf3e90d3
update zc706
2020-07-07 12:50:05 +08:00
