From d51f86672a96ed1c09e1731ba95b5ab4c40eab90 Mon Sep 17 00:00:00 2001 From: spaqin Date: Mon, 22 May 2023 15:32:49 +0800 Subject: [PATCH] fix analyzer target for masters --- src/gateware/kasli_soc.py | 2 +- src/gateware/zc706.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gateware/kasli_soc.py b/src/gateware/kasli_soc.py index 1204b0de..e355c16e 100755 --- a/src/gateware/kasli_soc.py +++ b/src/gateware/kasli_soc.py @@ -311,7 +311,7 @@ class GenericMaster(SoCCore): self.submodules.routing_table = rtio.RoutingTableAccess(self.cri_con) self.csr_devices.append("routing_table") - self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.rtio_core.cri, + self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.cri_con.switch.slave, self.ps7.s_axi_hp1) self.csr_devices.append("rtio_analyzer") diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py index 85730eae..aabe5461 100755 --- a/src/gateware/zc706.py +++ b/src/gateware/zc706.py @@ -320,7 +320,7 @@ class _MasterBase(SoCCore): self.submodules.rtio_moninj = rtio.MonInj(rtio_channels) self.csr_devices.append("rtio_moninj") - self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.rtio_core.cri, + self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.cri_con.switch.slave, self.ps7.s_axi_hp1) self.csr_devices.append("rtio_analyzer")