From f199ac68b445742db646e707bf8cd915d374b48d Mon Sep 17 00:00:00 2001 From: Astro Date: Sun, 27 Oct 2019 22:54:34 +0100 Subject: [PATCH] zynq::ddr: don't overwrite slcr.ddr_pll_ctrl --- src/zynq/ddr/mod.rs | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/zynq/ddr/mod.rs b/src/zynq/ddr/mod.rs index 7cf0e95..fc5e117 100644 --- a/src/zynq/ddr/mod.rs +++ b/src/zynq/ddr/mod.rs @@ -42,10 +42,6 @@ impl DdrRam { let ddr2x_clk_divisor = 3 * ddr3x_clk_divisor / 2; slcr::RegisterBlock::unlocked(|slcr| { - slcr.ddr_pll_ctrl.write( - slcr::PllCtrl::zeroed() - ); - slcr.ddr_clk_ctrl.write( slcr::DdrClkCtrl::zeroed() .ddr_2xclkact(true)