From e61d1268aca5d9d3b1a63796a8d2223cc64b64a8 Mon Sep 17 00:00:00 2001 From: Astro Date: Fri, 25 Oct 2019 23:18:18 +0200 Subject: [PATCH] zynq::slcr: doc, fix --- src/zynq/slcr.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/zynq/slcr.rs b/src/zynq/slcr.rs index 2579df3..a95fd42 100644 --- a/src/zynq/slcr.rs +++ b/src/zynq/slcr.rs @@ -247,6 +247,8 @@ pub struct RegisterBlock { register_at!(RegisterBlock, 0xF8000000, new); impl RegisterBlock { + /// Required to modify these sclr registers: scl, pss_rst_ctrl, + /// apu_ctrl, and wdt_clk_sel pub fn unlocked R, R>(mut f: F) -> R { let mut self_ = Self::new(); self_.slcr_unlock.unlock(); @@ -287,7 +289,7 @@ impl SlcrUnlock { } register!(pll_ctrl, PllCtrl, RW, u32); -register_bits!(pll_ctrl, pll_fdiv, u8, 12, 18); +register_bits!(pll_ctrl, pll_fdiv, u16, 12, 18); register_bit!(pll_ctrl, pll_bypass_force, 4); register_bit!(pll_ctrl, pll_bypass_qual, 3); register_bit!(pll_ctrl, pll_pwrdwn, 1);