From dcee7213de11ac869e003f3d34f48a036f88c82f Mon Sep 17 00:00:00 2001 From: Stewart Mackenzie Date: Fri, 6 Mar 2020 18:37:15 +0800 Subject: [PATCH] devc pcap WIP --- build.sh | 8 +- experiments/src/main.rs | 11 +- experiments/src/pl_config.rs | 15 ++ libboard_zynq/src/devc/mod.rs | 132 +++++++++++++++++- libboard_zynq/src/devc/regs.rs | 8 +- ...db-zynq-commands => gdb-zynq-commands.gdb} | 4 + openocd/ocd-zynq-commands.ocd | 1 + shell.nix | 2 +- tmux.sh | 4 +- 9 files changed, 173 insertions(+), 12 deletions(-) create mode 100644 experiments/src/pl_config.rs rename openocd/{gdb-zynq-commands => gdb-zynq-commands.gdb} (89%) create mode 100644 openocd/ocd-zynq-commands.ocd diff --git a/build.sh b/build.sh index 84a6332..feafafb 100755 --- a/build.sh +++ b/build.sh @@ -1 +1,7 @@ -nix-shell --command "cargo xbuild --release" && scp -P 2204 -C target/armv7-none-eabihf/release/zc706-experiments $1@nixbld.m-labs.hk:/home/$1/zc706/zc706.elf +if [ $1 = "cora" ]; then + nix-shell --command "cd experiments && cargo xbuild --release --no-default-features --features=target_cora_z7_10" +elif [ -z $2 ]; then + nix-shell --command "cargo xbuild --release" && scp -P 2204 -C target/armv7-none-eabihf/release/experiments $1@nixbld.m-labs.hk:/home/$1/zc706/zc706.elf +else + nix-shell --command "cargo xbuild --release" && scp -C target/armv7-none-eabihf/release/experiments $1@rpi-4.m-labs.hk:/home/$1/zc706/zc706.elf +fi diff --git a/experiments/src/main.rs b/experiments/src/main.rs index dcaecc1..7e77542 100644 --- a/experiments/src/main.rs +++ b/experiments/src/main.rs @@ -3,7 +3,7 @@ use core::mem::transmute; use libcortex_a9::mutex::Mutex; -use libboard_zynq::{print, println, self as zynq, clocks::Clocks, clocks::source::{ClockSource, ArmPll, IoPll}}; +use libboard_zynq::{print, println, self as zynq, clocks::Clocks, clocks::source::{ClockSource, ArmPll, IoPll}, devc::{DevC}}; use libsupport_zynq::{ ram, alloc::{vec, vec::Vec}, boot, @@ -13,6 +13,8 @@ use libsupport_zynq::{ smoltcp::socket::SocketSet, smoltcp::socket::{TcpSocket, TcpSocketBuffer}, }; +mod pl_config; +use pl_config::load_pl; const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef]; @@ -20,6 +22,13 @@ static mut STACK_CORE1: [u32; 512] = [0; 512]; #[no_mangle] pub fn main_core0() { + let mut devc = DevC::new(); + load_pl(&mut devc); + loop {} +} + +//#[no_mangle] +pub fn main_core01() { // zynq::clocks::CpuClocks::enable_io(1_250_000_000); println!("\nzc706 main"); { diff --git a/experiments/src/pl_config.rs b/experiments/src/pl_config.rs new file mode 100644 index 0000000..4d95c5f --- /dev/null +++ b/experiments/src/pl_config.rs @@ -0,0 +1,15 @@ +use libboard_zynq::{print, println, self as zynq, + devc::{DevC}, +}; + +pub fn load_pl(devc: &mut DevC) { + devc.enable_and_select_pcap(); + devc.clear_interrupts(); + devc.initialize_pl(); + devc.wait_for_pl_to_be_ready(); + devc.disable_pcap_loopback(); + devc.disable_pcap_secure_mode(); + devc.load_dma(); + //devc.wait_for_dma_transfer(); + println!("end\n\n"); +} diff --git a/libboard_zynq/src/devc/mod.rs b/libboard_zynq/src/devc/mod.rs index ba4e98f..9db430f 100644 --- a/libboard_zynq/src/devc/mod.rs +++ b/libboard_zynq/src/devc/mod.rs @@ -1,6 +1,10 @@ +use core::fmt; + use libregister::*; mod regs; +use crate::println; + pub struct DevC { regs: &'static mut regs::RegisterBlock, } @@ -12,16 +16,134 @@ impl DevC { } } - pub fn enable(&mut self) { + pub fn enable_and_select_pcap(&mut self) { self.regs.control.modify(|_, w| { w.pcap_mode(true) - .pcap_pr(true) - }) + .pcap_pr(true) + }); + let status = self.regs.control.read(); + println!("pcap mode: {}, pcap_pr: {}",status.pcap_pr(), status.pcap_mode()); } - pub fn disable(&mut self) { + + pub fn enable_and_select_icap(&mut self) { self.regs.control.modify(|_, w| { - w.pcap_mode(false) + w.pcap_mode(true) .pcap_pr(false) }) } + + pub fn clear_interrupts(&mut self) { + self.regs.int_sts.modify(|_, w| { + w.pps_gts_usr_b_int(true) + .pps_fst_cfg_b_int(true) + .pps_gpwrdwn_b_int(true) + .pps_gts_cfg_b_int(true) + .pps_cfg_reset_b_int(true) + .ixr_axi_wto(true) + .ixr_axi_werr(true) + .ixr_axi_rto(true) + .ixr_axi_rerr(true) + .ixr_rx_fifo_ov(true) + .ixr_wr_fifo_lvl(true) + .ixr_rd_fifo_lvl(true) + .ixr_dma_cmd_err(true) + .ixr_dma_q_ov(true) + .ixr_dma_done(true) + .ixr_d_p_done(true) + .ixr_p2d_len_err(true) + .ixr_pcfg_hmac_err(true) + .ixr_pcfg_seu_err(true) + .ixr_pcfg_por_b(true) + .ixr_pcfg_cfg_rst(true) + .ixr_pcfg_done(true) + .ixr_pcfg_init_pe(true) + .ixr_pcfg_init_ne(true) + }) + } + + pub fn initialize_pl(&mut self) { + self.regs.control.modify(|_, w| { + w.pcfg_prog_b(true) + }); + let control = self.regs.control.read(); + println!("pcfg_prog_b mode: {}",control.pcfg_prog_b()); + self.regs.control.modify(|_, w| { + w.pcfg_prog_b(false) + }); + let control = self.regs.control.read(); + println!("pcfg_prog_b mode: {}",control.pcfg_prog_b()); + self.wait_for_status_pcfg_init_to_be(false); + self.regs.control.modify(|_, w| { + w.pcfg_prog_b(true) + }); + let control = self.regs.control.read(); + println!("pcfg_prog_b mode: {}",control.pcfg_prog_b()); + self.regs.int_sts.modify(|_,w| { + w.ixr_pcfg_done(true) + }); + let int_sts= self.regs.int_sts.read(); + println!("ixr_pcfg_done mode: {}",int_sts.ixr_pcfg_done()); + } + + pub fn wait_for_pl_to_be_ready(&self) { + self.wait_for_status_pcfg_init_to_be(true) + } + + pub fn disable_pcap_loopback(&mut self) { + let mctrl = self.regs.mctrl.read(); + println!("mctrl pcap_lpbk: {}", mctrl.pcap_lpbk()); + self.regs.mctrl.modify(|_,w| { + w.pcap_lpbk(false) + }); + let mctrl = self.regs.mctrl.read(); + println!("mctrl pcap_lpbk: {}", mctrl.pcap_lpbk()); + } + + pub fn enable_pcap_secure_mode(&mut self) { + self.regs.control.modify(|_, w| { + w.pcap_rate_en(true) + }); + } + pub fn disable_pcap_secure_mode(&mut self) { + let control = self.regs.control.read(); + println!("control pcap_rate_en: {}", control.pcap_rate_en()); + self.regs.control.modify(|_, w| { + w.pcap_rate_en(false) + }); + let control = self.regs.control.read(); + println!("control pcap_rate_en: {}", control.pcap_rate_en()); + } + + pub fn wait_for_dma_transfer(&self) { + self.wait_for_int_sts_ixr_dma_done_to_be(true); + } + + pub fn load_dma(&mut self) { + self.regs.dma_src_addr.modify(|_, w| { + w.src_addr(regs::SRC_ADDR) + }); + self.regs.dma_dest_addr.modify(|_, w| { + w.dest_addr(regs::DEST_ADDR) + }); + } + + fn wait_for_status_pcfg_init_to_be(&self, value: bool) { + loop { + let status = self.regs.status.read(); + println!("expected value for pcfg_init: {}, actual: {}",value, status.pcfg_init()); + if value == status.pcfg_init() { + return + } + } + } + + fn wait_for_int_sts_ixr_dma_done_to_be(&self, value: bool) { + loop { + let int_sts = self.regs.int_sts.read(); + println!("expected value for int_sts.ixr_dma_done: {}, actual: {}",value, int_sts.ixr_dma_done()); + if value == int_sts.ixr_dma_done() { + return + } + } + } } diff --git a/libboard_zynq/src/devc/regs.rs b/libboard_zynq/src/devc/regs.rs index 15c1c42..84f0d0c 100644 --- a/libboard_zynq/src/devc/regs.rs +++ b/libboard_zynq/src/devc/regs.rs @@ -3,6 +3,10 @@ use libregister::{ register_bit, register_bits, register_bits_typed, }; +pub const SRC_ADDR: u32 = 0x00000000; +pub const DEST_ADDR: u32 = 0xFFFFFFFF; +pub const TEST_DATA: u32 = 0xABCD1234; + #[repr(C)] pub struct RegisterBlock { pub control: Control, @@ -148,10 +152,10 @@ register_bit!(status, efuse_sec_en, 2); register_bit!(status, efuse_jtag_dis, 1); register!(dma_src_addr, DmaSrcAddr, RW, u32); -register_bits!(dma_src_addr, src_addr, u8, 0, 31); +register_bits!(dma_src_addr, src_addr, u32, 0, 31); register!(dma_dest_addr, DmaDestAddr, RW, u32); -register_bits!(dma_dest_addr, dest_addr, u8, 0, 31); +register_bits!(dma_dest_addr, dest_addr, u32, 0, 31); register!(dma_src_len, DmaSrcLen, RW, u32); register_bits!(dma_src_len, dma_len, u8, 0, 26); diff --git a/openocd/gdb-zynq-commands b/openocd/gdb-zynq-commands.gdb similarity index 89% rename from openocd/gdb-zynq-commands rename to openocd/gdb-zynq-commands.gdb index 1d9bc10..7caaf92 100644 --- a/openocd/gdb-zynq-commands +++ b/openocd/gdb-zynq-commands.gdb @@ -25,4 +25,8 @@ def dfr zynq-fsbl-restart end +#shortcut to load +def l + load +end diff --git a/openocd/ocd-zynq-commands.ocd b/openocd/ocd-zynq-commands.ocd new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/openocd/ocd-zynq-commands.ocd @@ -0,0 +1 @@ + diff --git a/shell.nix b/shell.nix index b32a4ea..2ef80c6 100644 --- a/shell.nix +++ b/shell.nix @@ -13,7 +13,7 @@ stdenv.mkDerivation { rustc cargo cargo-xbuild rustcSrc gcc - ]) ++ (with pkgs; [ openocd gdb ]); + ]) ++ (with pkgs; [ openocd gdb cgdb tcl ]); # Set Environment Variables RUST_BACKTRACE = 1; diff --git a/tmux.sh b/tmux.sh index 0dcde6b..79321db 100755 --- a/tmux.sh +++ b/tmux.sh @@ -10,7 +10,7 @@ then tmux select-pane -t 0 tmux send-keys "stty 115200 < /dev/ttyUSB1 && cat /dev/ttyUSB1" C-m tmux select-pane -t 1 - tmux send-keys "sleep 10 && cgdb zc706.elf -x openocd/gdb-zynq-commands" C-m + tmux send-keys "sleep 10 && cgdb zc706.elf -x openocd/gdb-zynq-commands.gdb" C-m tmux split-window -v tmux resize-pane -D 20 tmux send-keys "cd openocd && openocd -f zc706.cfg -c reset init" C-m @@ -21,7 +21,7 @@ else tmux select-pane -t 0 tmux send-keys "stty 115200 < /dev/ttyUSB1 && cat /dev/ttyUSB1" C-m tmux select-pane -t 1 - tmux send-keys "sleep 10 && cgdb target/armv7-none-eabihf/release/zc706-experiments -x openocd/gdb-zynq-commands" C-m + tmux send-keys "sleep 3 && cgdb target/armv7-none-eabihf/release/zc706-experiments -x openocd/gdb-zynq-commands.gdb" C-m tmux split-window -v tmux resize-pane -D 20 tmux send-keys "cd openocd && openocd -f cora-z7-10.cfg -c reset init" C-m