From 36947104e36b17086d18ba5dd54e09a6810548cf Mon Sep 17 00:00:00 2001 From: Harry Ho Date: Wed, 12 Aug 2020 16:27:17 +0800 Subject: [PATCH] libboard_zynq: make constructor names more consistent --- experiments/src/main.rs | 16 +++++------ libboard_zynq/src/ddr/mod.rs | 2 +- libboard_zynq/src/eth/mod.rs | 11 ++++--- libboard_zynq/src/flash/mod.rs | 2 +- libboard_zynq/src/gic.rs | 2 +- libboard_zynq/src/i2c/eeprom.rs | 6 ++-- libboard_zynq/src/i2c/mod.rs | 10 +++---- libboard_zynq/src/sdio/adma.rs | 4 +-- libboard_zynq/src/sdio/mod.rs | 6 ++-- libboard_zynq/src/sdio/sd_card.rs | 12 ++++---- libboard_zynq/src/stdio.rs | 5 +++- libboard_zynq/src/uart/mod.rs | 48 ++++++++++++++----------------- 12 files changed, 62 insertions(+), 62 deletions(-) diff --git a/experiments/src/main.rs b/experiments/src/main.rs index 17b12ff..2e44f83 100644 --- a/experiments/src/main.rs +++ b/experiments/src/main.rs @@ -57,7 +57,7 @@ static CORE1_RESTART: AtomicBool = AtomicBool::new(false); pub unsafe extern "C" fn IRQ() { if MPIDR.read().cpu_id() == 1{ let mpcore = mpcore::RegisterBlock::new(); - let mut gic = gic::InterruptController::new(mpcore); + let mut gic = gic::InterruptController::gic(mpcore); let id = gic.get_interrupt_id(); if id.0 == 0 { gic.end_interrupt(id); @@ -75,7 +75,7 @@ pub unsafe extern "C" fn IRQ() { } pub fn restart_core1() { - let mut interrupt_controller = gic::InterruptController::new(mpcore::RegisterBlock::new()); + let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::new()); CORE1_RESTART.store(true, Ordering::Relaxed); interrupt_controller.send_sgi(gic::InterruptId(0), gic::CPUCore::Core1.into()); while CORE1_RESTART.load(Ordering::Relaxed) { @@ -87,7 +87,7 @@ pub fn restart_core1() { pub fn main_core0() { // zynq::clocks::CpuClocks::enable_io(1_250_000_000); println!("\nzc706 main"); - let mut interrupt_controller = gic::InterruptController::new(mpcore::RegisterBlock::new()); + let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::new()); interrupt_controller.enable_interrupts(); // ps7_init::apply(); libboard_zynq::stdio::drop_uart(); @@ -131,7 +131,7 @@ pub fn main_core0() { clocks.cpu_1x() ); - let mut flash = zynq::flash::Flash::new(200_000_000).linear_addressing_mode(); + let mut flash = zynq::flash::Flash::flash(200_000_000).linear_addressing_mode(); let flash_ram: &[u8] = unsafe { core::slice::from_raw_parts(flash.ptr(), flash.size()) }; for i in 0..=1 { print!("Flash {}:", i); @@ -144,7 +144,7 @@ pub fn main_core0() { let timer = libboard_zynq::timer::GlobalTimer::start(); - let mut ddr = zynq::ddr::DdrRam::new(); + let mut ddr = zynq::ddr::DdrRam::ddrram(); #[cfg(not(feature = "target_zc706"))] ddr.memtest(); ram::init_alloc_ddr(&mut ddr); @@ -207,7 +207,7 @@ pub fn main_core0() { // Test I2C #[cfg(feature = "target_zc706")] { - let mut i2c = zynq::i2c::I2C::i2c(); + let mut i2c = zynq::i2c::I2c::i2c0(); i2c.init(); println!("I2C bit-banging enabled"); let mut eeprom = zynq::i2c::eeprom::EEPROM::new(&mut i2c, 16); @@ -237,7 +237,7 @@ pub fn main_core0() { println!(""); } - let eth = zynq::eth::Eth::default(HWADDR.clone()); + let eth = zynq::eth::Eth::eth0(HWADDR.clone()); println!("Eth on"); const RX_LEN: usize = 4096; @@ -331,7 +331,7 @@ static DONE: Mutex = Mutex::new(false); #[no_mangle] pub fn main_core1() { println!("Hello from core1!"); - let mut interrupt_controller = gic::InterruptController::new(mpcore::RegisterBlock::new()); + let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::new()); interrupt_controller.enable_interrupts(); let req = unsafe { &mut CORE1_REQ.1 }; let res = unsafe { &mut CORE1_RES.0 }; diff --git a/libboard_zynq/src/ddr/mod.rs b/libboard_zynq/src/ddr/mod.rs index b32e4ef..b6d9a57 100644 --- a/libboard_zynq/src/ddr/mod.rs +++ b/libboard_zynq/src/ddr/mod.rs @@ -22,7 +22,7 @@ pub struct DdrRam { } impl DdrRam { - pub fn new() -> Self { + pub fn ddrram() -> Self { let clocks = Self::clock_setup(); Self::calibrate_iob_impedance(&clocks); Self::configure_iob(); diff --git a/libboard_zynq/src/eth/mod.rs b/libboard_zynq/src/eth/mod.rs index 46f1b3a..8dc6978 100644 --- a/libboard_zynq/src/eth/mod.rs +++ b/libboard_zynq/src/eth/mod.rs @@ -148,7 +148,7 @@ pub struct Eth { } impl Eth { - pub fn default(macaddr: [u8; 6]) -> Self { + pub fn eth0(macaddr: [u8; 6]) -> Self { slcr::RegisterBlock::unlocked(|slcr| { // Manual example: 0x0000_1280 // MDIO @@ -280,19 +280,22 @@ impl Eth { } pub fn gem0(macaddr: [u8; 6]) -> Self { - Self::new(macaddr) + Self::gem_common(macaddr) } } impl Eth { + // TODO: Add a `eth1()` + pub fn gem1(macaddr: [u8; 6]) -> Self { - Self::new(macaddr) + Self::gem_common(macaddr) } } + impl Eth { - fn new(macaddr: [u8; 6]) -> Self { + fn gem_common(macaddr: [u8; 6]) -> Self { GEM::setup_clock(TX_1000); let mut inner = EthInner { diff --git a/libboard_zynq/src/flash/mod.rs b/libboard_zynq/src/flash/mod.rs index 8f7de4d..4b4ecc6 100644 --- a/libboard_zynq/src/flash/mod.rs +++ b/libboard_zynq/src/flash/mod.rs @@ -116,7 +116,7 @@ impl Flash { } impl Flash<()> { - pub fn new(clock: u32) -> Self { + pub fn flash(clock: u32) -> Self { Self::enable_clocks(clock); Self::setup_signals(); Self::reset(); diff --git a/libboard_zynq/src/gic.rs b/libboard_zynq/src/gic.rs index 4a84195..fc962c6 100644 --- a/libboard_zynq/src/gic.rs +++ b/libboard_zynq/src/gic.rs @@ -62,7 +62,7 @@ pub struct InterruptController { } impl InterruptController { - pub fn new(mpcore: &'static mut mpcore::RegisterBlock) -> Self { + pub fn gic(mpcore: &'static mut mpcore::RegisterBlock) -> Self { InterruptController { mpcore } } diff --git a/libboard_zynq/src/i2c/eeprom.rs b/libboard_zynq/src/i2c/eeprom.rs index de8319d..ac1ad2b 100644 --- a/libboard_zynq/src/i2c/eeprom.rs +++ b/libboard_zynq/src/i2c/eeprom.rs @@ -1,9 +1,9 @@ -use super::I2C; +use super::I2c; use crate::time::Milliseconds; use embedded_hal::timer::CountDown; pub struct EEPROM<'a> { - i2c: &'a mut I2C, + i2c: &'a mut I2c, port: u8, address: u8, page_size: u8, @@ -12,7 +12,7 @@ pub struct EEPROM<'a> { impl<'a> EEPROM<'a> { #[cfg(feature = "target_zc706")] - pub fn new(i2c: &'a mut I2C, page_size: u8) -> Self { + pub fn new(i2c: &'a mut I2c, page_size: u8) -> Self { EEPROM { i2c: i2c, port: 2, diff --git a/libboard_zynq/src/i2c/mod.rs b/libboard_zynq/src/i2c/mod.rs index 989efa0..d701b39 100644 --- a/libboard_zynq/src/i2c/mod.rs +++ b/libboard_zynq/src/i2c/mod.rs @@ -7,14 +7,14 @@ use super::time::Microseconds; use embedded_hal::timer::CountDown; use libregister::{RegisterR, RegisterRW, RegisterW}; -pub struct I2C { +pub struct I2c { regs: regs::RegisterWrapper, count_down: super::timer::global::CountDown } -impl I2C { +impl I2c { #[cfg(feature = "target_zc706")] - pub fn i2c() -> Self { + pub fn i2c0() -> Self { // Route I2C 0 SCL / SDA Signals to MIO Pins 50 / 51 slcr::RegisterBlock::unlocked(|slcr| { // SCL @@ -37,10 +37,10 @@ impl I2C { slcr.gpio_rst_ctrl.reset_gpio(); }); - Self::ctor_common(0xFFFF - 0x000C) + Self::i2c_common(0xFFFF - 0x000C) } - fn ctor_common(gpio_output_mask: u16) -> Self { + fn i2c_common(gpio_output_mask: u16) -> Self { // Setup register block let self_ = Self { regs: regs::RegisterWrapper::new(), diff --git a/libboard_zynq/src/sdio/adma.rs b/libboard_zynq/src/sdio/adma.rs index 7543981..f5b3237 100644 --- a/libboard_zynq/src/sdio/adma.rs +++ b/libboard_zynq/src/sdio/adma.rs @@ -1,6 +1,6 @@ /// ADMA library use core::mem::MaybeUninit; -use super::SDIO; +use super::Sdio; use libcortex_a9::cache; use libregister::{ register, register_bit, @@ -32,7 +32,7 @@ impl Adma2DescTable { } /// Initialize the table and setup `adma_system_address` - pub fn setup(&mut self, sdio: &mut SDIO, blk_cnt: u32, buffer: &[u8]) { + pub fn setup(&mut self, sdio: &mut Sdio, blk_cnt: u32, buffer: &[u8]) { let descr_table = &mut self.0; let blk_size = sdio .regs diff --git a/libboard_zynq/src/sdio/mod.rs b/libboard_zynq/src/sdio/mod.rs index cc69d1c..b96f447 100644 --- a/libboard_zynq/src/sdio/mod.rs +++ b/libboard_zynq/src/sdio/mod.rs @@ -12,7 +12,7 @@ use log::{trace, debug}; use nb; /// Basic SDIO Struct with common low-level functions. -pub struct SDIO { +pub struct Sdio { regs: &'static mut regs::RegisterBlock, count_down: super::timer::global::CountDown, input_clk_hz: u32, @@ -48,7 +48,7 @@ pub enum CardType { CardMmc, } -impl SDIO { +impl Sdio { /// Initialize SDIO0 /// card_detect means if we would use the card detect pin, /// false to disable card detection (assume there is card inserted) @@ -121,7 +121,7 @@ impl SDIO { slcr.sdio_clk_ctrl.enable_sdio0(); }); let clocks = Clocks::get(); - let mut self_ = SDIO { + let mut self_ = Sdio { regs: regs::RegisterBlock::sdio0(), count_down: unsafe { super::timer::GlobalTimer::get() }.countdown(), input_clk_hz: clocks.sdio_ref_clk(), diff --git a/libboard_zynq/src/sdio/sd_card.rs b/libboard_zynq/src/sdio/sd_card.rs index f681b81..8fd3133 100644 --- a/libboard_zynq/src/sdio/sd_card.rs +++ b/libboard_zynq/src/sdio/sd_card.rs @@ -1,4 +1,4 @@ -use super::{adma::Adma2DescTable, cmd, CardType, CmdTransferError, SDIO}; +use super::{adma::Adma2DescTable, cmd, CardType, CmdTransferError, Sdio}; use libcortex_a9::cache; use libregister::{RegisterR, RegisterRW, RegisterW}; use log::{trace, debug}; @@ -37,7 +37,7 @@ enum CardVersion { } pub struct SdCard { - sdio: SDIO, + sdio: Sdio, adma2_desc_table: Adma2DescTable, card_version: CardVersion, hcs: bool, @@ -171,8 +171,8 @@ impl SdCard { Ok(()) } - /// Convert SDIO into SdCard struct, error if no card inserted or it is not an SD card. - pub fn from_sdio(mut sdio: SDIO) -> Result { + /// Convert Sdio into SdCard struct, error if no card inserted or it is not an SD card. + pub fn from_sdio(mut sdio: Sdio) -> Result { match sdio.identify_card()? { CardType::CardSd => (), _ => return Err(CardInitializationError::NoCardInserted), @@ -192,8 +192,8 @@ impl SdCard { Ok(_self) } - /// Convert SdCard struct back to SDIO struct. - pub fn to_sdio(self) -> SDIO { + /// Convert SdCard struct back to Sdio struct. + pub fn to_sdio(self) -> Sdio { self.sdio } diff --git a/libboard_zynq/src/stdio.rs b/libboard_zynq/src/stdio.rs index 393fe68..24f43bd 100644 --- a/libboard_zynq/src/stdio.rs +++ b/libboard_zynq/src/stdio.rs @@ -37,7 +37,10 @@ impl DerefMut for LazyUart { fn deref_mut(&mut self) -> &mut Uart { match self { LazyUart::Uninitialized => { - let uart = Uart::serial(UART_RATE); + #[cfg(feature = "target_cora_z7_10")] + let uart = Uart::uart0(UART_RATE); + #[cfg(feature = "target_zc706")] + let uart = Uart::uart1(UART_RATE); *self = LazyUart::Initialized(uart); self } diff --git a/libboard_zynq/src/uart/mod.rs b/libboard_zynq/src/uart/mod.rs index b052119..a94c4b4 100644 --- a/libboard_zynq/src/uart/mod.rs +++ b/libboard_zynq/src/uart/mod.rs @@ -13,31 +13,8 @@ pub struct Uart { } impl Uart { - #[cfg(feature = "target_zc706")] - pub fn serial(baudrate: u32) -> Self { - slcr::RegisterBlock::unlocked(|slcr| { - // Route UART 1 RxD/TxD Signals to MIO Pins - // TX pin - slcr.mio_pin_48.write( - slcr::MioPin48::zeroed() - .l3_sel(0b111) - .io_type(slcr::IoBufferType::Lvcmos18) - .pullup(true) - ); - // RX pin - slcr.mio_pin_49.write( - slcr::MioPin49::zeroed() - .tri_enable(true) - .l3_sel(0b111) - .io_type(slcr::IoBufferType::Lvcmos18) - .pullup(true) - ); - }); - Self::uart1(baudrate) - } - #[cfg(feature = "target_cora_z7_10")] - pub fn serial(baudrate: u32) -> Self { + pub fn uart0(baudrate: u32) -> Self { slcr::RegisterBlock::unlocked(|slcr| { // Route UART 0 RxD/TxD Signals to MIO Pins // TX pin @@ -56,10 +33,7 @@ impl Uart { .pullup(true) ); }); - Self::uart0(baudrate) - } - pub fn uart0(baudrate: u32) -> Self { slcr::RegisterBlock::unlocked(|slcr| { slcr.uart_rst_ctrl.reset_uart0(); slcr.aper_clk_ctrl.enable_uart0(); @@ -72,7 +46,27 @@ impl Uart { self_ } + #[cfg(feature = "target_zc706")] pub fn uart1(baudrate: u32) -> Self { + slcr::RegisterBlock::unlocked(|slcr| { + // Route UART 1 RxD/TxD Signals to MIO Pins + // TX pin + slcr.mio_pin_48.write( + slcr::MioPin48::zeroed() + .l3_sel(0b111) + .io_type(slcr::IoBufferType::Lvcmos18) + .pullup(true) + ); + // RX pin + slcr.mio_pin_49.write( + slcr::MioPin49::zeroed() + .tri_enable(true) + .l3_sel(0b111) + .io_type(slcr::IoBufferType::Lvcmos18) + .pullup(true) + ); + }); + slcr::RegisterBlock::unlocked(|slcr| { slcr.uart_rst_ctrl.reset_uart1(); slcr.aper_clk_ctrl.enable_uart1();