forked from M-Labs/artiq-zynq
404 lines
15 KiB
Nix
404 lines
15 KiB
Nix
{
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description = "ARTIQ port to the Zynq-7000 platform";
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inputs.artiq.url = git+https://github.com/m-labs/artiq.git;
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inputs.zynq-rs.url = git+https://git.m-labs.hk/m-labs/zynq-rs;
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inputs.zynq-rs.inputs.nixpkgs.follows = "artiq/nixpkgs";
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outputs = { self, zynq-rs, artiq }:
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let
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pkgs = import artiq.inputs.nixpkgs { system = "x86_64-linux"; overlays = [ (import zynq-rs.inputs.rust-overlay) ]; };
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zynqpkgs = zynq-rs.packages.x86_64-linux;
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artiqpkgs = artiq.packages.x86_64-linux;
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llvmPackages_11 = zynq-rs.llvmPackages_11;
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zynqRev = self.sourceInfo.rev or "unknown";
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rust = zynq-rs.rust;
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rustPlatform = zynq-rs.rustPlatform;
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fastnumbers = pkgs.python3Packages.buildPythonPackage rec {
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pname = "fastnumbers";
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version = "5.1.0";
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src = pkgs.python3Packages.fetchPypi {
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inherit pname version;
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sha256 = "sha256-4JLTP4uVwxcaL7NOV57+DFSwKQ3X+W/6onYkN2AdkKc=";
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};
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};
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artiq-netboot = pkgs.python3Packages.buildPythonPackage rec {
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pname = "artiq-netboot";
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version = "unstable-2020-10-15";
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src = pkgs.fetchgit {
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url = "https://git.m-labs.hk/m-labs/artiq-netboot.git";
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rev = "04f69eb07df73abe4b89fde2c24084f7664f2104";
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sha256 = "0ql4fr8m8gpb2yql8aqsdqsssxb8zqd6l65kl1f6s9845zy7shs9";
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};
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};
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ramda = pkgs.python3Packages.buildPythonPackage {
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pname = "ramda";
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version = "unstable-2020-04-11";
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src = pkgs.fetchFromGitHub {
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owner = "peteut";
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repo = "ramda.py";
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rev = "d315a9717ebd639366bf3fe26bad9e3d08ec3c49";
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sha256 = "sha256-bmSt/IHDnULsZjsC6edELnNH7LoJSVF4L4XhwBAXRkY=";
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};
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nativeBuildInputs = with pkgs.python3Packages; [ pbr ];
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propagatedBuildInputs = with pkgs.python3Packages; [ future fastnumbers ];
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checkInputs = with pkgs.python3Packages; [ pytest ];
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checkPhase = "pytest";
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doCheck = false;
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preBuild = ''
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export PBR_VERSION=0.5.5
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'';
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};
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migen-axi = pkgs.python3Packages.buildPythonPackage {
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pname = "migen-axi";
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version = "unstable-2023-01-06";
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src = pkgs.fetchFromGitHub {
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owner = "peteut";
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repo = "migen-axi";
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rev = "27eaa84a70a3abfe1930c86c36c4de2cd652da35";
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sha256 = "sha256-3Y9W5ns+1wbVd14iePzgSBzE+LxnGMUDtUw3BccFt80=";
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};
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format = "pyproject";
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propagatedBuildInputs = with pkgs.python3Packages; [ setuptools click numpy toolz jinja2 ramda artiqpkgs.migen artiqpkgs.misoc ];
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checkInputs = with pkgs.python3Packages; [ pytestCheckHook pytest-timeout ];
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# migen/misoc version checks are broken with pyproject for some reason
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postPatch = ''
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sed -i "1,4d" pyproject.toml
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substituteInPlace pyproject.toml \
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--replace '"migen@git+https://github.com/m-labs/migen",' ""
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substituteInPlace pyproject.toml \
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--replace '"misoc@git+https://github.com/m-labs/misoc.git",' ""
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# pytest-flake8 is broken with recent flake8. Re-enable after fix.
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substituteInPlace setup.cfg --replace '--flake8' ""
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'';
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};
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binutils = { platform, target, zlib }: pkgs.stdenv.mkDerivation rec {
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basename = "binutils";
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version = "2.30";
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name = "${basename}-${platform}-${version}";
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src = pkgs.fetchurl {
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url = "https://ftp.gnu.org/gnu/binutils/binutils-${version}.tar.bz2";
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sha256 = "028cklfqaab24glva1ks2aqa1zxa6w6xmc8q34zs1sb7h22dxspg";
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};
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configureFlags =
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[ "--enable-shared" "--enable-deterministic-archives" "--target=${target}"];
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outputs = [ "out" "info" "man" ];
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depsBuildBuild = [ pkgs.buildPackages.stdenv.cc ];
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buildInputs = [ zlib ];
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enableParallelBuilding = true;
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};
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binutils-arm = pkgs.callPackage binutils { platform = "arm"; target = "armv7-unknown-linux-gnueabihf"; };
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# FSBL configuration supplied by Vivado 2020.1 for these boards:
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fsblTargets = ["zc702" "zc706" "zed"];
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sat_variants = [
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# kasli-soc satellite variants
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"satellite"
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# zc706 satellite variants
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"nist_clock_satellite" "nist_qc2_satellite" "acpki_nist_clock_satellite" "acpki_nist_qc2_satellite"
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"nist_clock_satellite_100mhz" "nist_qc2_satellite_100mhz" "acpki_nist_clock_satellite_100mhz" "acpki_nist_qc2_satellite_100mhz"
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];
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board-package-set = { target, variant, json ? null }: let
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szl = zynqpkgs."${target}-szl";
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fsbl = zynqpkgs."${target}-fsbl";
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fwtype = if builtins.elem variant sat_variants then "satman" else "runtime";
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firmware = rustPlatform.buildRustPackage rec {
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name = "firmware";
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src = ./src;
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cargoLock = {
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lockFile = src/Cargo.lock;
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outputHashes = {
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"tar-no-std-0.1.8" = "sha256-xm17108v4smXOqxdLvHl9CxTCJslmeogjm4Y87IXFuM=";
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"nalgebra-0.32.6" = "sha256-L/YudkVOtfGYoNQKBD7LMk/sMYgRDzPDdpGL5rO7G2I=";
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};
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};
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nativeBuildInputs = [
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pkgs.gnumake
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(pkgs.python3.withPackages(ps: [ ps.jsonschema artiqpkgs.migen migen-axi artiqpkgs.misoc artiqpkgs.artiq ]))
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zynqpkgs.cargo-xbuild
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llvmPackages_11.llvm
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llvmPackages_11.clang-unwrapped
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];
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buildPhase = ''
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export ZYNQ_REV=${zynqRev}
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export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
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export CLANG_EXTRA_INCLUDE_DIR="${llvmPackages_11.clang-unwrapped.lib}/lib/clang/11.1.0/include"
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export CARGO_HOME=$(mktemp -d cargo-home.XXX)
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export ZYNQ_RS=${zynq-rs}
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make TARGET=${target} GWARGS="${if json == null then "-V ${variant}" else json}" ${fwtype}
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'';
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installPhase = ''
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mkdir -p $out $out/nix-support
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cp ../build/${fwtype}.bin $out/${fwtype}.bin
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cp ../build/firmware/armv7-none-eabihf/release/${fwtype} $out/${fwtype}.elf
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echo file binary-dist $out/${fwtype}.bin >> $out/nix-support/hydra-build-products
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echo file binary-dist $out/${fwtype}.elf >> $out/nix-support/hydra-build-products
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'';
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doCheck = false;
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dontFixup = true;
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auditable = false;
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};
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gateware = pkgs.runCommand "${target}-${variant}-gateware"
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{
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nativeBuildInputs = [
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(pkgs.python3.withPackages(ps: [ ps.jsonschema artiqpkgs.migen migen-axi artiqpkgs.misoc artiqpkgs.artiq ]))
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artiqpkgs.vivado
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];
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}
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''
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export ZYNQ_REV=${zynqRev}
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python ${./src/gateware}/${target}.py -g build ${if json == null then "-V ${variant}" else json}
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mkdir -p $out $out/nix-support
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cp build/top.bit $out
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echo file binary-dist $out/top.bit >> $out/nix-support/hydra-build-products
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'';
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# SZL startup
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jtag = pkgs.runCommand "${target}-${variant}-jtag" {}
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''
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mkdir $out
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ln -s ${szl}/szl.elf $out
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ln -s ${firmware}/${fwtype}.bin $out
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ln -s ${gateware}/top.bit $out
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'';
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sd = pkgs.runCommand "${target}-${variant}-sd"
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{
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buildInputs = [ zynqpkgs.mkbootimage ];
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}
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''
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# Do not use "long" paths in boot.bif, because embedded developers
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# can't write software (mkbootimage will segfault).
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bifdir=`mktemp -d`
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cd $bifdir
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ln -s ${szl}/szl.elf szl.elf
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ln -s ${firmware}/${fwtype}.elf ${fwtype}.elf
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ln -s ${gateware}/top.bit top.bit
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cat > boot.bif << EOF
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the_ROM_image:
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{
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[bootloader]szl.elf
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top.bit
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${fwtype}.elf
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}
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EOF
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mkdir $out $out/nix-support
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mkbootimage boot.bif $out/boot.bin
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echo file binary-dist $out/boot.bin >> $out/nix-support/hydra-build-products
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'';
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# FSBL startup
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fsbl-sd = pkgs.runCommand "${target}-${variant}-fsbl-sd"
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{
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buildInputs = [ zynqpkgs.mkbootimage ];
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}
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''
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bifdir=`mktemp -d`
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cd $bifdir
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ln -s ${fsbl}/fsbl.elf fsbl.elf
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ln -s ${gateware}/top.bit top.bit
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ln -s ${firmware}/${fwtype}.elf ${fwtype}.elf
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cat > boot.bif << EOF
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the_ROM_image:
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{
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[bootloader]fsbl.elf
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top.bit
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${fwtype}.elf
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}
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EOF
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mkdir $out $out/nix-support
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mkbootimage boot.bif $out/boot.bin
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echo file binary-dist $out/boot.bin >> $out/nix-support/hydra-build-products
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'';
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in {
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"${target}-${variant}-firmware" = firmware;
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"${target}-${variant}-gateware" = gateware;
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"${target}-${variant}-jtag" = jtag;
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"${target}-${variant}-sd" = sd;
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} // (
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if builtins.elem target fsblTargets
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then {
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"${target}-${variant}-fsbl-sd" = fsbl-sd;
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}
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else {}
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);
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gateware-sim = pkgs.stdenv.mkDerivation {
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name = "gateware-sim";
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nativeBuildInputs = [
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(pkgs.python3.withPackages(ps: [ artiqpkgs.migen migen-axi artiqpkgs.artiq ]))
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];
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phases = [ "buildPhase" ];
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buildPhase =
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''
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python -m unittest discover ${self}/src/gateware -v
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touch $out
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'';
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};
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fmt-check = pkgs.stdenvNoCC.mkDerivation {
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name = "fmt-check";
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src = ./src;
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nativeBuildInputs = [ rust pkgs.gnumake ];
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phases = [ "unpackPhase" "buildPhase" ];
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buildPhase =
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''
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export ZYNQ_RS=${zynq-rs}
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make manifests
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cargo fmt -- --check
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touch $out
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'';
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};
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# for hitl-tests
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zc706-nist_qc2 = (board-package-set { target = "zc706"; variant = "nist_qc2"; });
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zc706-hitl-tests = pkgs.stdenv.mkDerivation {
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name = "zc706-hitl-tests";
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__networked = true; # compatibility with old patched Nix
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# breaks hydra, https://github.com/NixOS/hydra/issues/1216
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#__impure = true; # Nix 2.8+
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buildInputs = [
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pkgs.netcat pkgs.openssh pkgs.rsync artiqpkgs.artiq artiq-netboot zynqpkgs.zc706-szl
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];
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phases = [ "buildPhase" ];
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buildPhase =
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''
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export NIX_SSHOPTS="-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_ed25519"
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LOCKCTL=$(mktemp -d)
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mkfifo $LOCKCTL/lockctl
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cat $LOCKCTL/lockctl | ${pkgs.openssh}/bin/ssh \
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$NIX_SSHOPTS \
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rpi-4 \
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'mkdir -p /tmp/board_lock && flock /tmp/board_lock/zc706-1 -c "echo Ok; cat"' \
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| (
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# End remote flock via FIFO
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atexit_unlock() {
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echo > $LOCKCTL/lockctl
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}
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trap atexit_unlock EXIT
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# Read "Ok" line when remote successfully locked
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read LOCK_OK
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echo Power cycling board...
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(echo b; sleep 5; echo B; sleep 5) | nc -N -w6 192.168.1.31 3131
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echo Power cycle done.
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export USER=hydra
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export OPENOCD_ZYNQ=${zynq-rs}/openocd
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export SZL=${zynqpkgs.szl}
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bash ${self}/remote_run.sh -h rpi-4 -o "$NIX_SSHOPTS" -d ${zc706-nist_qc2.zc706-nist_qc2-jtag}
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echo Waiting for the firmware to boot...
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sleep 15
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echo Running test kernel...
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artiq_run --device-db ${self}/examples/device_db.py ${self}/examples/mandelbrot.py
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echo Running ARTIQ unit tests...
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export ARTIQ_ROOT=${self}/examples
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export ARTIQ_LOW_LATENCY=1
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python -m unittest discover artiq.test.coredevice -v
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touch $out
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echo Completed
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(echo b; sleep 5) | nc -N -w6 192.168.1.31 3131
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echo Board powered off
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)
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'';
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};
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in rec {
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packages.x86_64-linux =
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{
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inherit fastnumbers artiq-netboot ramda migen-axi binutils-arm;
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} //
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(board-package-set { target = "zc706"; variant = "nist_clock"; }) //
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(board-package-set { target = "zc706"; variant = "nist_clock_master"; }) //
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(board-package-set { target = "zc706"; variant = "nist_clock_master_100mhz"; }) //
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(board-package-set { target = "zc706"; variant = "nist_clock_satellite"; }) //
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(board-package-set { target = "zc706"; variant = "nist_clock_satellite_100mhz"; }) //
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(board-package-set { target = "zc706"; variant = "nist_qc2"; }) //
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(board-package-set { target = "zc706"; variant = "nist_qc2_master"; }) //
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(board-package-set { target = "zc706"; variant = "nist_qc2_master_100mhz"; }) //
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(board-package-set { target = "zc706"; variant = "nist_qc2_satellite"; }) //
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(board-package-set { target = "zc706"; variant = "nist_qc2_satellite_100mhz"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_clock"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_clock_master"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_clock_master_100mhz"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_clock_satellite"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_clock_satellite_100mhz"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_qc2"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_qc2_master"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_qc2_master_100mhz"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_qc2_satellite"; }) //
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(board-package-set { target = "zc706"; variant = "acpki_nist_qc2_satellite_100mhz"; }) //
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(board-package-set { target = "kasli_soc"; variant = "demo"; json = ./demo.json; }) //
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(board-package-set { target = "kasli_soc"; variant = "master"; json = ./kasli-soc-master.json; }) //
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(board-package-set { target = "kasli_soc"; variant = "satellite"; json = ./kasli-soc-satellite.json; }) //
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(board-package-set { target = "ebaz4205"; variant = "base"; });
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hydraJobs = packages.x86_64-linux // { inherit zc706-hitl-tests; inherit gateware-sim; inherit fmt-check; };
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devShell.x86_64-linux = pkgs.mkShell {
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name = "artiq-zynq-dev-shell";
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buildInputs = with pkgs; [
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rust
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llvmPackages_11.llvm
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llvmPackages_11.clang-unwrapped
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gnumake
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cacert
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zynqpkgs.cargo-xbuild
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zynqpkgs.mkbootimage
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openocd
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openssh rsync
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(python3.withPackages(ps: (with artiqpkgs; [ migen migen-axi misoc artiq artiq-netboot ps.jsonschema ps.pyftdi ])))
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artiqpkgs.artiq
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artiqpkgs.vivado
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binutils-arm
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pre-commit
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];
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ZYNQ_REV="${zynqRev}";
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XARGO_RUST_SRC = "${rust}/lib/rustlib/src/rust/library";
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CLANG_EXTRA_INCLUDE_DIR = "${llvmPackages_11.clang-unwrapped.lib}/lib/clang/11.1.0/include";
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ZYNQ_RS = "${zynq-rs}";
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OPENOCD_ZYNQ = "${zynq-rs}/openocd";
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SZL = "${zynqpkgs.szl}";
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};
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makeArtiqZynqPackage = board-package-set;
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};
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}
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