forked from M-Labs/artiq-zynq
acpki: implement input interface
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0354699ae3
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1eeee43d64
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@ -11,7 +11,7 @@ pub const RTIO_O_STATUS_UNDERFLOW: i32 = 2;
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pub const RTIO_O_STATUS_DESTINATION_UNREACHABLE: i32 = 4;
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pub const RTIO_I_STATUS_WAIT_EVENT: i32 = 1;
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pub const RTIO_I_STATUS_OVERFLOW: i32 = 2;
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pub const RTIO_I_STATUS_WAIT_STATUS: i32 = 4;
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pub const RTIO_I_STATUS_WAIT_STATUS: i32 = 4; // TODO
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pub const RTIO_I_STATUS_DESTINATION_UNREACHABLE: i32 = 8;
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#[repr(C)]
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@ -32,7 +32,7 @@ struct Transaction {
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padding: i64,
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reply_status: VolatileCell<i32>,
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reply_data: VolatileCell<i32>,
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reply_timestamp: VolatileCell<u64>
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reply_timestamp: VolatileCell<i64>
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}
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static mut TRANSACTION_BUFFER: Transaction = Transaction {
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@ -69,16 +69,18 @@ pub extern fn get_counter() -> i64 {
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}
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}
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static mut NOW: i64 = 0;
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pub extern fn now_mu() -> i64 {
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unsafe { TRANSACTION_BUFFER.request_timestamp }
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unsafe { NOW }
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}
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pub extern fn at_mu(t: i64) {
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unsafe { TRANSACTION_BUFFER.request_timestamp = t }
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unsafe { NOW = t }
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}
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pub extern fn delay_mu(dt: i64) {
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unsafe { TRANSACTION_BUFFER.request_timestamp += dt }
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unsafe { NOW += dt }
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}
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#[inline(never)]
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@ -107,6 +109,7 @@ pub extern fn output(target: i32, data: i32) {
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TRANSACTION_BUFFER.request_cmd = 0;
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TRANSACTION_BUFFER.request_target = target;
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TRANSACTION_BUFFER.request_timestamp = NOW;
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TRANSACTION_BUFFER.request_data = data as i64;
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asm::dmb();
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@ -133,15 +136,112 @@ pub extern fn output_wide(target: i32, data: CSlice<i32>) {
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}
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pub extern fn input_timestamp(timeout: i64, channel: i32) -> i64 {
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unimplemented!();
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unsafe {
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// Clear status so we can observe response
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 1;
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TRANSACTION_BUFFER.request_timestamp = NOW;
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TRANSACTION_BUFFER.request_target = channel << 8;
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asm::dmb();
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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artiq_raise!("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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channel as i64, 0, 0);
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}
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if status & RTIO_I_STATUS_WAIT_EVENT != 0 {
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return -1
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}
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if status & RTIO_I_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!("RTIODestinationUnreachable",
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"RTIO destination unreachable, input, on channel {0}",
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channel as i64, 0, 0);
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}
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TRANSACTION_BUFFER.reply_timestamp.get()
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}
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}
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pub extern fn input_data(channel: i32) -> i32 {
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unimplemented!();
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unsafe {
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 1;
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TRANSACTION_BUFFER.request_timestamp = -1;
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TRANSACTION_BUFFER.request_target = channel << 8;
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asm::dmb();
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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artiq_raise!("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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channel as i64, 0, 0);
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}
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if status & RTIO_I_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!("RTIODestinationUnreachable",
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"RTIO destination unreachable, input, on channel {0}",
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channel as i64, 0, 0);
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}
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TRANSACTION_BUFFER.reply_data.get()
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}
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}
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pub extern fn input_timestamped_data(timeout: i64, channel: i32) -> TimestampedData {
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unimplemented!();
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unsafe {
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 1;
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TRANSACTION_BUFFER.request_timestamp = timeout;
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TRANSACTION_BUFFER.request_target = channel << 8;
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asm::dmb();
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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artiq_raise!("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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channel as i64, 0, 0);
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}
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if status & RTIO_I_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!("RTIODestinationUnreachable",
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"RTIO destination unreachable, input, on channel {0}",
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channel as i64, 0, 0);
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}
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TimestampedData {
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timestamp: TRANSACTION_BUFFER.reply_timestamp.get(),
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data: TRANSACTION_BUFFER.reply_data.get(),
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}
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}
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}
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pub fn write_log(data: &[i8]) {
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