forked from M-Labs/artiq-zynq
use simplified ps7_init
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parent
3bd4643009
commit
0c1de42547
10
src/Cargo.lock
generated
10
src/Cargo.lock
generated
@ -200,7 +200,7 @@ dependencies = [
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[[package]]
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name = "libasync"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#9fcf9243f2dd2e9fcd61d17ddb1d6d495a68893f"
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dependencies = [
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"embedded-hal",
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"libcortex_a9",
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@ -212,7 +212,7 @@ dependencies = [
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[[package]]
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name = "libboard_zynq"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#9fcf9243f2dd2e9fcd61d17ddb1d6d495a68893f"
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dependencies = [
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"bit_field",
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"embedded-hal",
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@ -236,7 +236,7 @@ dependencies = [
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[[package]]
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name = "libcortex_a9"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#9fcf9243f2dd2e9fcd61d17ddb1d6d495a68893f"
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dependencies = [
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"bit_field",
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"libregister",
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@ -245,7 +245,7 @@ dependencies = [
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[[package]]
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name = "libregister"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#9fcf9243f2dd2e9fcd61d17ddb1d6d495a68893f"
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dependencies = [
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"bit_field",
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"vcell",
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@ -255,7 +255,7 @@ dependencies = [
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[[package]]
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name = "libsupport_zynq"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#9fcf9243f2dd2e9fcd61d17ddb1d6d495a68893f"
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dependencies = [
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"compiler_builtins",
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"libboard_zynq",
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@ -9,7 +9,7 @@ extern crate alloc;
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use core::{cmp, str};
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use log::{info, error};
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use libboard_zynq::{timer::GlobalTimer, logger, devc};
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use libboard_zynq::{timer::GlobalTimer, logger, devc, slcr};
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use libsupport_zynq::ram;
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mod sd_reader;
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@ -72,6 +72,10 @@ pub fn main_core0() {
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// Do not load again: assume that the gateware already present is
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// what we want (e.g. gateware configured via JTAG before PS
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// startup, or by FSBL).
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// Make sure that the PL/PS interface is enabled (e.g. OpenOCD does not enable it).
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slcr::RegisterBlock::unlocked(|slcr| {
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slcr.init_postload_fpga();
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});
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} else {
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// Load from SD card
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match load_pl::load_bitstream_from_sd() {
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