diff --git a/szl/src/main.rs b/szl/src/main.rs
index ca3e243..aafda8b 100644
--- a/szl/src/main.rs
+++ b/szl/src/main.rs
@@ -80,8 +80,12 @@ pub fn main_core0() {
     );
     info!("Simple Zynq Loader starting...");
 
+    #[cfg(not(feature = "target_kasli_soc"))]
     const CPU_FREQ: u32 = 800_000_000;
 
+    #[cfg(feature = "target_kasli_soc")]
+    const CPU_FREQ: u32 = 1_000_000_000;
+
     ArmPll::setup(2 * CPU_FREQ);
     Clocks::set_cpu_freq(CPU_FREQ);
     IoPll::setup(1_000_000_000);