forked from M-Labs/thermostat
main: revise clock rates
systick seemed to be running too slow
This commit is contained in:
parent
5db38b3f27
commit
eac7c8232f
@ -39,10 +39,10 @@ fn main() -> ! {
|
|||||||
stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
|
stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
|
||||||
let _clocks = dp.RCC.constrain()
|
let _clocks = dp.RCC.constrain()
|
||||||
.cfgr
|
.cfgr
|
||||||
.sysclk(168.mhz())
|
.sysclk(84.mhz())
|
||||||
.hclk(84.mhz())
|
.hclk(84.mhz())
|
||||||
.pclk1(32.mhz())
|
.pclk1(16.mhz())
|
||||||
.pclk2(64.mhz())
|
.pclk2(32.mhz())
|
||||||
.freeze();
|
.freeze();
|
||||||
|
|
||||||
let mut wd = IndependentWatchdog::new(dp.IWDG);
|
let mut wd = IndependentWatchdog::new(dp.IWDG);
|
||||||
|
Loading…
Reference in New Issue
Block a user