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main: use HSE clock

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supposed to lead to more stable pwm
This commit is contained in:
Astro 2020-03-12 18:31:43 +01:00
parent f021ebd6e6
commit 89b0d142ad
1 changed files with 6 additions and 1 deletions
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7
src/main.rs
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@ -16,7 +16,7 @@ use embedded_hal::watchdog::{WatchdogEnable, Watchdog};
use stm32f4xx_hal::{ use stm32f4xx_hal::{
rcc::RccExt, rcc::RccExt,
watchdog::IndependentWatchdog, watchdog::IndependentWatchdog,
time::U32Ext, time::{U32Ext, MegaHertz},
stm32::{CorePeripherals, Peripherals}, stm32::{CorePeripherals, Peripherals},
}; };
use smoltcp::{ use smoltcp::{
@ -49,6 +49,9 @@ const WATCHDOG_INTERVAL: u32 = 10_000;
const NET_HWADDR: [u8; 6] = [0x02, 0x00, 0xDE, 0xAD, 0xBE, 0xEF]; const NET_HWADDR: [u8; 6] = [0x02, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
const HSE: MegaHertz = MegaHertz(8);
/// Initialization and main loop /// Initialization and main loop
#[entry] #[entry]
fn main() -> ! { fn main() -> ! {
@ -61,8 +64,10 @@ fn main() -> ! {
let dp = Peripherals::take().unwrap(); let dp = Peripherals::take().unwrap();
stm32_eth::setup(&dp.RCC, &dp.SYSCFG); stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
let clocks = dp.RCC.constrain() let clocks = dp.RCC.constrain()
.cfgr .cfgr
.use_hse(HSE)
.sysclk(168.mhz()) .sysclk(168.mhz())
.hclk(168.mhz()) .hclk(168.mhz())
.pclk1(32.mhz()) .pclk1(32.mhz())