forked from M-Labs/thermostat
parent
f021ebd6e6
commit
89b0d142ad
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@ -16,7 +16,7 @@ use embedded_hal::watchdog::{WatchdogEnable, Watchdog};
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use stm32f4xx_hal::{
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use stm32f4xx_hal::{
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rcc::RccExt,
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rcc::RccExt,
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watchdog::IndependentWatchdog,
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watchdog::IndependentWatchdog,
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time::U32Ext,
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time::{U32Ext, MegaHertz},
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stm32::{CorePeripherals, Peripherals},
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stm32::{CorePeripherals, Peripherals},
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};
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};
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use smoltcp::{
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use smoltcp::{
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@ -49,6 +49,9 @@ const WATCHDOG_INTERVAL: u32 = 10_000;
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const NET_HWADDR: [u8; 6] = [0x02, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
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const NET_HWADDR: [u8; 6] = [0x02, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
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const HSE: MegaHertz = MegaHertz(8);
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/// Initialization and main loop
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/// Initialization and main loop
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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@ -61,8 +64,10 @@ fn main() -> ! {
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let dp = Peripherals::take().unwrap();
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let dp = Peripherals::take().unwrap();
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stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
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stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
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let clocks = dp.RCC.constrain()
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let clocks = dp.RCC.constrain()
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.cfgr
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.cfgr
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.use_hse(HSE)
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.sysclk(168.mhz())
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.sysclk(168.mhz())
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.hclk(168.mhz())
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.hclk(168.mhz())
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.pclk1(32.mhz())
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.pclk1(32.mhz())
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